Series Volatile Nonvolatile Switches for Memory Leakage Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing integration density of memory elements in electronic devices poses challenges due to the difficulty in fabricating smaller transistors with desired characteristics on single crystalline silicon wafers, leading to restricted design flexibility and prohibitively high fabrication costs, as well as issues with sneak currents and leakage in memory arrays.
Innovation Solution
The use of memristor-like nonvolatile switches and current-controlled volatile switches in series, where the volatile switch has high resistance at low voltages/currents, effectively disconnecting memory elements from read circuitry and minimizing leakage, allowing independent engineering of switch properties to meet design requirements without the need for transistors as switching elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If single crystalline silicon transistors are used as access devices, then switching characteristics are satisfied, but fabrication cost increases prohibitively and design flexibility is restricted
Solution Approach 1:
The patent extracts the switching function from traditional transistor-based access devices and implements it using a crossbar array structure with selector devices and memory elements. This removes the need for expensive single crystalline silicon transistors while maintaining switching functionality through the crossbar architecture itself, where selected intersections enable current flow and unselected intersections block it.
Solution Approach 2:
The patent segments the memory array into a crossbar structure where switching functionality is distributed across multiple selector devices at intersections rather than requiring centralized transistor control. Each selector device independently controls current flow through its associated memory element, enabling scalable fabrication without proportionally increasing control device complexity or cost.
2Quantity of substance
If transistor size is reduced to increase integration density, then memory capacity increases, but switching requirements become increasingly difficult to satisfy
Solution Approach 1:
The patent transitions from planar transistor scaling to a three-dimensional crossbar array architecture. By organizing memory elements and selector devices in intersecting row and column lines that extend through multiple layers, the system achieves high integration density without reducing the physical size of individual switching components, thereby maintaining switching performance while increasing capacity.
3Ease of operation
If traditional transistor access devices are used, then switching control is achieved, but sneak currents and leakage occur in memory arrays
Solution Approach 1:
The patent introduces selector devices as intermediary components at each crossbar intersection that actively control current flow between row and column lines. These selector devices function as voltage-controlled switches that remain in high-impedance state for unselected lines, blocking sneak currents and leakage paths while enabling precise control of current through selected memory elements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces sneak currents, enhances design flexibility, and maintains high ON/OFF ratios while minimizing fabrication costs, enabling higher integration density and efficient operation of memory arrays without the complexity and cost associated with transistors.
Implementation Method 1
the volatile switch has high resistance at low voltages/currents, where the volatile switch effectively disconnects the memory element from the read circuitry and minimizes leakage
Implementation Method 2
The nonvolatile switch can be set to a first low resistance state by applying a voltage higher than a positive threshold voltage and to a second high resistance state by applying a voltage more negative than a negative threshold voltage
Data Source
AI summary
A memory element includes a nonvolatile switch to be set to a first low resistance state by applying a voltage higher than a positive threshold voltage and to a second high resistance state by applying another voltage more negative than a negative threshold voltage. The memory element further includes a volatile switch in series with the nonvolatile switch, the nonvolatile switch to be set to a third low resistance state by applying a current higher than a threshold current and to fourth high resistance state by applying a current lower than the threshold current. A method for operating a memory array with memory elements with series volatile and nonvolatile switches is also provided.