SET Filter Circuit Using Triple Data Channels and Voting Logic
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Solution Overview
Problem
CMOS integrated circuits are vulnerable to radiation effects such as Single Event Effects (SEE) in aerospace and military applications, leading to unreliable performance due to the inability of existing mitigation techniques to effectively harden against both Single Event Upsets (SEUs) and Single Event Transients (SETS) without increasing silicon area or complexity.
Innovation Solution
The implementation of a circuit design that generates three nominally equivalent data channels from nominally equivalent logic signals, transmitted to three separate sequential elements with voting gates, providing a complete SEE hardened solution by duplicating logic functions and using guard gates to filter out transient signals, thereby mitigating both SEUs and SETs without significant area overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional SEU mitigation techniques (large drivers, dice-cell, TMR) are used to harden sequential logic, then reliability against radiation effects is improved, but silicon area and circuit complexity increase significantly
Solution Approach 1:
The invention divides the data path into three separate nominally equivalent data channels that are physically separated. Each channel is processed independently through its own combinational logic path, and only one channel needs to be affected by a radiation-induced SET to maintain correct operation after voting. This segmentation allows standard sequential elements to be used without complex mitigation circuitry.
Solution Approach 2:
The invention introduces an intermediary encoding scheme where data is transmitted through three separate channels with embedded timing information. The receiver uses this intermediary representation to reconstruct the original data signal by detecting transitions across the three channels, effectively filtering out SET errors that affect only one channel.
2Reliability
If driver size is increased to restore voltage on logic nodes before incorrect signals propagate, then SEU mitigation is achieved, but transistor size and area overhead increase
Solution Approach 1:
The invention segments the data transmission into three independent channels, allowing the use of minimum-sized transistors in each channel. The segmentation provides inherent redundancy so that standard small drivers suffice, as long as two out of three channels remain correct.
Solution Approach 2:
The invention creates three copies of the data transmission path (nominally equivalent channels) that carry the same information in encoded form. This copying approach provides redundancy without requiring oversized drivers, as the redundancy is achieved through spatial duplication rather than increased drive strength.
3Reliability
If Triple Module Redundancy is implemented to mitigate SEUs, then reliability is improved, but silicon area increases due to triplication of logic
Solution Approach 1:
The invention segments data into three channels but transmits them sequentially rather than requiring three simultaneous identical logic paths. This temporal segmentation allows the same logic to be reused across three time-multiplexed channels, achieving TMR-like reliability without the area overhead of spatial triplication.
Solution Approach 2:
The invention uses periodic action by cycling through three different data encoding states across the three channels over time. Each channel carries a different phase of the encoded data sequence, and the receiver reconstructs the original signal by combining information from all three periodic channels, achieving redundancy without permanent triplication of logic.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively hardens the circuit against SEE by ensuring that only one data channel is affected by a radiation-induced error, allowing the voting gate to correct the signal, thus maintaining reliability without increasing silicon area or complexity.
Implementation Method 1
a delay element having an input coupled to the input of the SET filter and having an output coupled to a second input on the guard gate, the delay element generating a second nominally equivalent logic signal
Data Source
AI summary
A method for single event transient filtering in an integrated circuit device is described. The device comprises three sequential elements, each having a data input and a data output with each of the three data outputs coupled to one of three inputs of a voting gate. The method comprises generating first and second nominally equivalent logic signals in first and second SET domains, converting the first and second nominally equivalent logic signals into first, second and third nominally equivalent data channels, and transmitting the first, second and third nominally equivalent data channels to the data inputs of the first, second and third sequential elements. Provision is made for applying the method to logic designs implemented in programmable logic integrated circuit devices.