SET-Filtered D Flip-Flop Circuit for Radiation Hardening
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Solution Overview
Problem
Conventional flip-flop circuits are vulnerable to single-event upsets due to radiation, requiring additional circuits and space for immunity, which is not feasible in compact technologies like those used in aircraft and spacecraft due to power consumption and silicon area concerns.
Innovation Solution
A radiation-hardened D flip-flop circuit design incorporating single-input and dual-input inverters, tri-state inverters, and single-event transient (SET) filters to filter out glitches and enhance radiation resistance without the need for redundant circuits, utilizing temporal filters and optimal transistor sizing to minimize area requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional circuits are added to conventional flip-flop circuits to make them immune to single-event upsets, then radiation hardness is improved, but silicon area and power consumption increase significantly
Solution Approach 1:
The circuit is divided into two distinct latches (master latch and slave latch) with separate sensitive nodes. Each latch handles specific signal paths, allowing radiation hardening to be achieved through node separation rather than redundant circuits. The master latch processes input signals while the slave latch processes output signals, preventing single-event upsets from propagating through the entire circuit.
Solution Approach 2:
The patent extracts and eliminates the need for redundant circuits by using a singleLatch configuration with separated sensitive nodes. Instead of adding duplicate circuits for radiation hardening, the design removes vulnerability by separating the sensitive nodes within a single latch structure, achieving radiation hardness without the area penalty of redundant circuits.
2Reliability
If additional circuits are added to conventional flip-flop circuits to make them immune to single-event upsets, then radiation hardness is improved, but power consumption increases
Solution Approach 1:
By segmenting the circuit into master and slave latches with separated sensitive nodes, the patent eliminates the need for additional power-consuming redundant circuits. The segmentation allows each node to be optimized independently, reducing overall power consumption while maintaining radiation hardness.
3Reliability
If sensitive nodes separation is implemented in conventional flip-flop circuits, then radiation hardness is improved, but device complexity increases
Solution Approach 1:
The patent segments the flip-flop circuit into a master latch and a slave latch, each with clearly defined sensitive nodes. This segmentation provides radiation hardness through node separation while maintaining manageable complexity by organizing the circuit into two functional blocks with distinct responsibilities.
Solution Approach 2:
The patent extracts the radiation hardening function from complex redundant circuits and implements it through simple sensitive node separation in a singleLatch configuration. This extraction achieves radiation hardness with minimal additional complexity by removing the need for redundant circuit paths.
Data Source
AI summary
A flip-flop circuit is disclosed. The flip-flop circuit includes a single-input inverter, a dual-input inverter, a single-input tri-state inverter, a dual-input tri-state inverter, and two single-event transient (SET) filters. The single-input tri-state inverter receives an input signal D. The dual-input tri-state inverter includes a first input, a second input and an output, wherein the first input receives output signals from the dual-input inverter and the second input receives output signals from the dual-input inverter via the first SET filter. The output of the dual-input tri-state inverter sends output signals to a first input of the dual-input inverter and a second input of the dual-input inverter via the second SET filter. The single-input inverter receives inputs from the dual-input inverter to provide an output signal Q for the flip-flop circuit.