SF6 Plasma Etching for Silicon Layer Removal
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Double patterning technologies using plasma etching with HBr or Cl2 gas systems face issues where silicon-containing layers are not completely removed, leaving residues, or the underlayer films are damaged when trying to remove them.
Innovation Solution
A method involving the formation of a silicon nitride or oxide layer on the side walls of a patterned silicon-containing layer, followed by selective plasma etching using SF6 gas to remove the silicon-containing layer without residues and underlayer damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If plasma etching is performed with HBr or Cl2 gas to completely remove the silicon-containing layer, then the silicon-containing layer is completely removed, but the silicon oxide layer or silicon nitride layer of the underlayer film is etched causing damage
Solution Approach 1:
The patent changes the chemical parameters of the etching gas from conventional HBr or Cl2 to SF6-based gas. This parameter change enables selective etching where the silicon-containing layer is removed while the silicon oxide or silicon nitride underlayer remains intact, achieving both complete removal and no damage to the underlayer film.
2Object-affected harmful factors
If plasma etching is performed with high selection ratio to protect the underlayer film, then the underlayer film is protected from damage, but residues of the silicon-containing layer are left between the side wall portions
Solution Approach 1:
The patent changes the etching gas parameter to SF6-based gas which provides the right balance of selectivity and etching power. This enables complete removal of the silicon-containing layer without leaving residues, while simultaneously protecting the underlayer film from damage through appropriate selection ratio control.
3Device complexity
If conventional photolithography single patterning is used, then the process is simple, but the pattern interval cannot be sufficiently miniaturized
Solution Approach 1:
The patent employs double patterning technology that divides the patterning process into two stages: first forming a preliminary pattern, then using it as a mask to form the final fine-pitch pattern. This segmentation enables sufficient pattern interval miniaturization while maintaining process feasibility through the use of SF6-based selective etching.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the complete removal of the silicon-containing layer with a high selection ratio, preventing residues and underlayer film damage, thereby enabling the production of high-quality semiconductor devices.
Implementation Method 1
selectively removing the silicon-containing layer through plasma etching
Implementation Method 2
an etching gas containing a SF6 gas is used
Data Source
AI summary
This semiconductor device manufacturing method is provided with: a film-forming step wherein a silicon nitride layer or a silicon oxide layer is formed such that a side wall portion of a silicon-containing layer, which is formed on a substrate and patterned, is covered with the silicon nitride layer or the silicon oxide layer; and a plasma etching step wherein the silicon-containing layer is selectively removed, and the silicon nitride layer or the silicon oxide layer formed on the side wall portion is left. In the plasma etching step, an etching gas containing SF6 gas is used.