SGT CMOS Pillar Sidewall Orientation for Carrier Mobility
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Solution Overview
Problem
Conventional CMOS techniques face limitations in increasing device element density and optimizing carrier mobility, particularly due to the compromise between electron and hole mobility on different crystal planes, which affects the performance of N-channel and P-channel FETs.
Innovation Solution
The development of a semiconductor structure and fabrication method that utilizes various crystal planes for SGT CMOS devices, allowing for the formation of SGTs with optimized carrier mobility by orienting sidewalls of pillar bodies on different crystal planes, such as (100) and (110), to achieve desired performance without complex fabrication processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a conventional planar CMOS device uses a single crystal plane, then fabrication is simplified, but carrier mobility cannot be optimized for both electron and hole transport simultaneously
Solution Approach 1:
The invention achieves universality by using a multi-oriented substrate that can simultaneously support both N-channel and P-channel FETs with optimized carrier mobility. The substrate serves multiple functions: (100) regions optimize electron transport for N-channel devices, while (110) regions optimize hole transport for P-channel devices, all within a single substrate structure.
Data Source
AI summary
In contrast to a conventional planar CMOS technique in design and fabrication for a field-effect transistor (FET), the present invention provides an SGT CMOS device formed on a conventional substrate using various crystal planes in association with a channel type and a pillar shape of an FET, without a need for a complicated device fabrication process. Further, differently from a design technique of changing a surface orientation in each planar FET, the present invention is designed to change a surface orientation in each SGT to achieve improvement in carrier mobility. Thus, a plurality of SGTs having various crystal planes can be formed on a common substrate to achieve a plurality of different carrier mobilities so as to obtain desired performance.