Shielded Gate Trench MOSFET With Integrated Super Barrier Rectifier
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Solution Overview
Problem
Existing shielded gate trench MOSFETs face high on-resistance and switching loss due to parasitic body diode issues, which are not adequately addressed by previous designs.
Innovation Solution
Integration of a super barrier rectifier (SBR) with a short channel on a single chip, featuring a unique trench structure and epitaxial layer configuration, along with a super junction structure to reduce on-resistance and switching loss, while maintaining reliable performance at elevated temperatures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a parasitic body diode is present in traditional MOSFET structures, then the device can provide inherent reverse protection, but it causes high Qrr (reverse recovery charge) and high switching loss
Solution Approach 1:
The patent extracts and removes the parasitic body diode from the MOSFET structure by integrating a separate SBR (Super Barrier Rectifier) device. The SBR is formed in a dedicated second type trench with its own cathode and anode regions, separating the rectification function from the MOSFET's body diode, thereby eliminating the harmful reverse recovery charge while maintaining reverse protection capability.
Solution Approach 2:
The patent segments the power device into distinct functional units: the MOSFET for forward conduction and the integrated SBR for reverse protection. This segmentation allows each component to be optimized independently - the MOSFET for low on-resistance and the SBR for low Qrr - while working together to solve the contradiction between reliability and energy loss.
2Loss of energy
If the channel length is reduced to lower on-resistance, then the device achieves better conduction performance, but it increases the impact of parasitic effects and reduces breakdown voltage
Solution Approach 1:
The patent applies local quality by creating a short channel implant region with specific doping characteristics only in the SBR portion of the device. This region has different electrical properties than the main MOSFET channel, allowing the SBR to achieve low on-resistance with short channel length while maintaining adequate breakdown voltage through localized doping optimization.
Solution Approach 2:
The patent changes key parameters including channel length, doping concentration, and oxide thickness to optimize the SBR's electrical characteristics. By adjusting these parameters, the device achieves low on-resistance through short channels while compensating for reduced breakdown voltage through optimized doping profiles and geometric configurations.
3Loss of energy
If Schottky Barrier rectifier is used for reverse protection, then the device achieves low forward voltage, but it exhibits high reverse leakage current and poor performance at elevated temperatures
Solution Approach 1:
The patent employs a composite structure combining P-type and N-type doped regions to form the SBR, replacing the metal-semiconductor Schottky junction with a P-N junction based barrier. This composite doping structure maintains low forward voltage characteristics while significantly improving reverse leakage current performance and thermal stability through the inherent properties of the P-N junction configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively lowers on-resistance and switching loss, providing better performance and reliability compared to traditional designs, especially at elevated temperatures, by creating a low potential barrier for majority carriers and optimizing the epitaxial layer resistivity and trench geometry.
Implementation Method 1
The integrated SBR creates a low potential barrier for majority carrier in MOS channel, which is adjustable by gate oxide thickness, P body doping concentration and channel length
Implementation Method 2
an epitaxial layer of a first conductivity type extending over a substrate of the first conductivity type, the substrate having a higher doping concentration than the epitaxial layer
Implementation Method 3
the first gate electrode being insulated from the epitaxial layer by a first gate oxide film
Data Source
AI summary
An integrated circuit comprising an SGT MOSFET and a short channel SBR is disclosed. The SBR horizontally disposed in different areas to the SGT MOSFET on single chip creates a low potential barrier for majority carrier in MOS channel for switching loss reduction. Only one additional mask is required for integration of the short channel SBR having thinner gate oxide than the SGT MOSFET. Moreover, in some preferred embodiment, an MSO structure is applied to the shielded gate structure to further reduce the on-resistance.