Shadow Register Files for Exception Handling in Coarse Grained Arrays
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The tightly-coupled coarse grained array architecture faces significant overhead and complexity in processing exceptions due to the need for context switching, especially when handling interrupts and exceptions that do not require task switching, as it involves storing and restoring a large number of register files, which is time-consuming and resource-intensive.
Innovation Solution
The introduction of shadow register files and shadow central register files allows for exception handling without storing or restoring the context of the central register files, enabling exceptions to be processed efficiently by freezing and restarting processing elements, thereby reducing the overhead of context switching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If context switching is performed to handle exceptions in tightly-coupled coarse grained array architecture, then exception handling capability is improved, but processing time and resource usage increase significantly
Solution Approach 1:
The register file system is segmented into two distinct parts: original register files for normal operation and shadow register files for exception handling. This segmentation allows exception handling to occur in isolated shadow registers without affecting the main processing flow, eliminating the need for time-consuming context switches while maintaining exception handling capability.
Solution Approach 2:
Shadow register files are pre-configured and ready before exceptions occur. When an exception is detected, the system can immediately switch to using shadow registers without performing preliminary saving or restoring operations, as these resources are already prepared in advance for exception handling scenarios.
2Reliability
If context switching is performed to handle exceptions, then exception processing is enabled, but system complexity and overhead increase
Solution Approach 1:
The system is divided into normal processing mode using original register files and exception processing mode using shadow register files. This segmentation simplifies the exception handling mechanism by providing dedicated resources for each mode, reducing the complexity of context management and overhead associated with switching between modes.
Solution Approach 2:
Shadow register files serve as copies of the original register files specifically for exception handling purposes. These shadow copies allow the system to handle exceptions without modifying or saving the state of the original register files, thereby reducing system overhead and complexity while maintaining full exception processing capability.
3Reliability
If all register files are saved and restored during exception handling, then complete context preservation is achieved, but resource usage and processing time increase
Solution Approach 1:
The register file system is segmented into original and shadow portions, allowing exception handling to use only shadow registers. This segmentation enables complete context preservation for exception processing while avoiding the resource-intensive operation of saving and restoring all original register files, thereby reducing energy consumption and resource usage.
Solution Approach 2:
Shadow register files are preliminarily allocated and ready for exception handling before exceptions occur. This preliminary preparation eliminates the need for real-time saving and restoring of register contexts during exception processing, significantly reducing resource usage and energy consumption while maintaining accurate context preservation.
Data Source
AI summary
A processor including a coarse grained array including a plurality of processing elements, a central register file including a first plurality of register files, a shadow central register file including a second plurality of register files, each of the second plurality of register files corresponding to each of the first plurality of register files included in the central register file, and a plurality of shadow register files, each of the plurality of shadow register files corresponding to each of a third plurality of register files included in predetermined processing elements selected from the plurality of processing elements.