Shared Calibration-Line Impedance Circuit for Memory Termination
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Solution Overview
Problem
The increasing operating speed of semiconductor devices leads to signal impedance mismatch issues, causing data transmission delays and distortions due to external noise, power voltage variations, and temperature changes, which are not effectively addressed by conventional impedance adjusting circuits, resulting in setup/hold failures and input level errors.
Innovation Solution
An impedance adjusting circuit with a reduced area is achieved by using a calibration circuit that generates and transfers first and second calibration codes through shared transmission lines, allowing the termination resistor circuit to match impedance during specific sections, thereby reducing the number of required transmission lines and chip area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If separate transmission lines are used for first and second calibration codes, then calibration accuracy is improved, but chip area increases
Solution Approach 1:
The patent merges the transmission paths for first and second calibration codes by using a single shared transmission line. The calibration circuit selectively transfers either the first calibration code or the second calibration code to the termination resistor circuit through this common transmission line, eliminating the need for separate transmission lines and thereby reducing chip area while maintaining calibration functionality
Solution Approach 2:
The patent implements periodic action by using a selection signal to alternately enable the transfer of first and second calibration codes through the shared transmission line. The calibration circuit transfers the first calibration code during one period and the second calibration code during another period, allowing time-division multiplexing that reduces hardware requirements while maintaining calibration accuracy
2Reliability
If impedance matching is performed using conventional termination circuits, then signal reflection is reduced, but circuit complexity increases
Solution Approach 1:
The patent applies dynamics by making the termination resistance adjustable rather than fixed. The termination resistor circuit receives calibration codes and dynamically adjusts its resistance value to match the impedance of the external circuit under varying PVT (process, voltage, temperature) conditions. This dynamic adjustment capability allows the circuit to maintain optimal signal transmission quality while adapting to different operating conditions without requiring multiple fixed termination circuits
Solution Approach 2:
The patent changes the resistance parameter of the termination resistor circuit based on calibration codes that reflect PVT conditions. By varying the resistance parameter dynamically according to process, voltage, and temperature variations, the circuit maintains impedance matching across different operating conditions, improving signal transmission quality without increasing circuit complexity
Data Source
AI summary
An impedance adjusting circuit includes: a calibration circuit configured to generate a first calibration code and a second calibration code for determining termination resistance; a transmission line circuit configured to transfer the first calibration code during a first section and to transfer the second calibration code during a second section; and a termination resistor circuit adapted to match an impedance with a resistance determined by receiving the first and second calibration codes.