Shared Circuit Non-Volatile Memory for Parallel Access
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Solution Overview
Problem
Existing memory circuits face inefficiencies in accommodating both small and large granularity data access within reduced chip area, leading to increased material and manufacturing costs due to separate supporting circuits for EEPROM and Flash memory matrices.
Innovation Solution
A non-volatile memory circuit that combines EEPROM and Flash memory elements, sharing supporting circuits to enable parallel access, thereby reducing chip area usage and production costs while maintaining efficient data access in both small and large unit bases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate supporting circuits are provided for EEPROM and Flash memory matrices, then each memory type can be accessed independently, but chip area increases and manufacturing costs increase
Solution Approach 1:
The patent merges the supporting circuits of EEPROM and Flash memory matrices into a shared infrastructure. Common components such as bit lines, word lines, sense amplifiers, and control logic are consolidated to serve both memory types simultaneously, reducing overall chip area while maintaining independent access capabilities through selective activation
Solution Approach 2:
The supporting circuits are designed with multi-functionality to handle both EEPROM and Flash memory operations. The same bit lines and word lines can be configured to access either memory type, and control logic can selectively enable the appropriate memory matrix based on operation requirements, eliminating the need for dedicated separate circuits
2Adaptability or versatility
If separate supporting circuits are provided for EEPROM and Flash memory matrices, then each memory type can be accessed independently, but manufacturing costs increase
Solution Approach 1:
By consolidating supporting circuits into a shared infrastructure, the patent reduces the total component count and interconnect complexity. This merging approach simplifies the manufacturing process, reduces material usage, and lowers production costs while preserving the ability to independently access either memory type through selective circuit activation
3Ease of operation
If EEPROM elements are used for small granularity data access, then access flexibility is improved, but chip area increases
Solution Approach 1:
The patent segments the memory system into EEPROM and Flash memory matrices, each optimized for specific access patterns. EEPROM provides flexible byte-level access for small granularity operations, while Flash handles bulk operations. The shared supporting circuit infrastructure allows both segments to coexist efficiently without requiring dedicated resources for each
Solution Approach 2:
The supporting circuits are designed to universally support both EEPROM and Flash memory operations. The same bit lines, word lines, and control logic can be configured to access either memory type, allowing EEPROM's flexible access capability to be utilized without duplicating the entire supporting infrastructure
Data Source
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AI summary
A non-volatile memory circuit includes memory rows and supporting circuits coupled to the memory rows, where at least one of the memory rows include at least one Electrically Erasable Programmable Read-Only Memory (EEPROM) memory element and at least one Flash memory element. The EEPROM and Flash elements are configured to share some of the supporting circuits and can be accessed in parallel.