Shared Column ADCs With Charge Summing for In-Memory Computing
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Solution Overview
Problem
Existing in-memory computing systems face challenges in scaling and summing analog signals from multiple columns of bit cells, requiring multiple analog-to-digital converters (ADCs) which increases energy consumption and introduces quantization errors.
Innovation Solution
The system employs a charge divider network to scale and sum analog signals from bit cells, allowing for proportional charge accumulation and conversion to digital data, reducing the need for individual ADCs per column and minimizing quantization errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple individual ADCs are used for each column of bit cells, then each column can be converted to digital data independently, but energy consumption increases and quantization errors are introduced
Solution Approach 1:
Multiple column output signals are merged into a single combined analog signal through a summing circuit before being converted to digital by a single shared ADC. This combining approach reduces the number of ADCs from multiple individual converters to one shared converter, thereby reducing energy consumption while maintaining digital conversion capability.
Solution Approach 2:
A single ADC is designed to handle multiple column inputs by receiving a combined analog signal that represents the sum of multiple column outputs. This universal ADC performs the digital conversion function for all columns simultaneously, making the converter multi-functional and reducing overall system energy consumption.
2Adaptability or versatility
If multiple individual ADCs are used for each column, then digital conversion can be performed independently for each column, but the number of ADCs increases system complexity
Solution Approach 1:
The system merges multiple column processing paths into a single digital conversion path by summing analog signals before ADC conversion. This reduces device complexity by eliminating redundant ADC components while maintaining the ability to process multiple columns through analog signal combination.
Solution Approach 2:
An analog summing circuit acts as an intermediary between multiple column outputs and a single ADC. This mediator combines multiple analog signals into one composite signal that preserves information from all columns, enabling a single ADC to replace multiple ADCs and reduce system complexity.
3Productivity
If analog signals from multiple columns are summed directly without scaling, then the summation process is simple, but the dynamic range increases requiring higher precision ADCs
Solution Approach 1:
Analog scaling is applied to individual column signals before they are summed together. This preliminary scaling adjusts the amplitude of each column's analog signal according to its weight, ensuring that when signals are combined, the resulting dynamic range remains manageable and can be handled by standard precision ADCs.
Solution Approach 2:
The analog signals undergo parameter changes through scaling operations that adjust their amplitude levels before summation. By modifying the signal parameters (amplitude/weight) in advance, the system maintains an optimized dynamic range that reduces the precision requirements of the subsequent ADC conversion.
4Use of energy by moving object
If analog signals are scaled and summed before digital conversion, then energy efficiency improves and ADC requirements reduce, but additional analog circuitry is required
Solution Approach 1:
An analog summing and scaling circuit serves as an intermediary stage between the bit cell columns and the single ADC. This intermediate circuit performs the necessary analog signal processing (scaling and summation) to enable energy-efficient single-ADC conversion, balancing the added analog complexity against the reduced ADC count and improved energy efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances energy efficiency and reduces ADC requirements, while maintaining accurate analog output signals by scaling and summing analog signals before digital conversion, thereby improving the dynamic range and reducing computational noise.
Implementation Method 1
analog accumulation or summation of the weighted-data-representative analog signals provides a scaled result
Implementation Method 2
The system employs a charge divider network to scale and sum analog signals from bit cells
Data Source
AI summary
Various embodiments comprise systems, methods, architectures, mechanisms, apparatus, and improvements thereof for scaling and summing a plurality of weighted-data-representative analog signals provided by columns of in-memory computing bit cells within an N×M array of bit cells such that analog accumulation or summation of the weighted-data-representative analog signals provides a scaled result for further processing.