Shared Data Output Control Unit for Semiconductor Memory

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Solution Overview

Problem

Conventional semiconductor memory devices face increased chip size and current consumption due to multiple data output control units, particularly when data width is high, such as X32, which poses design challenges.

Innovation Solution

A data output circuit design that shares a common data output control unit among multiple data output units, using clock pulses with predetermined pulse widths to synchronize data output, reducing the need for redundant control units and thereby minimizing chip size and current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple data output control units are used to control multiple data output units, then data output synchronization and reliability are improved, but chip size and current consumption increase

Engineering Contradiction:
Improvedata output synchronizationVSAvoidchip size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

Multiple data output control units are merged into a single shared control unit that generates clock pulses for multiple data output units. The control unit is configured to output clock pulses with specific pulse widths that enable multiple data output units to operate independently while maintaining synchronization, thereby reducing chip size without sacrificing reliability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The data output control unit is designed with multi-functionality to serve multiple data output units simultaneously. It can dynamically adjust clock pulse widths based on the number of data output units activated, allowing a single control unit to perform the functions previously requiring multiple dedicated control units.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If multiple data output control units are used to control multiple data output units, then data output synchronization is improved, but current consumption increases

Engineering Contradiction:
Improvedata output synchronizationVSAvoidcurrent consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

Multiple data output control units are merged into a single shared control unit that generates clock pulses for multiple data output units. The control unit is configured to output clock pulses with specific pulse widths that enable multiple data output units to operate independently while maintaining synchronization, thereby reducing current consumption without sacrificing reliability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The control unit dynamically changes the pulse width parameter of clock signals based on the operational state of data output units. When fewer data output units are active, the pulse width is reduced, thereby lowering current consumption while maintaining adequate synchronization for the active units.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If data width is increased to X32 for high-speed data processing, then bandwidth and productivity are improved, but the number of control units and chip size increase

Engineering Contradiction:
ImprovebandwidthVSAvoidnumber of control units
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The data output control unit is designed with multi-functionality to support multiple data output units with different data widths (X8, X16, X32). It can dynamically adjust its operation to accommodate the required data width by controlling the appropriate number of data output units, thereby achieving high bandwidth without proportionally increasing the number of control units.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system dynamically adjusts the number of active data output units and their corresponding clock pulse widths based on the required data width. This dynamic configuration allows the system to achieve X32 bandwidth when needed while using fewer control resources, reducing overall device complexity.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7826303B2Data output circuit having shared data output control unit
Publication Date: 2010.11.02 SK HYNIX INC
  • US7826303B2 patent drawing
  • US7826303B2 patent drawing
  • US7826303B2 patent drawing

AI summary

A data output circuit is provided which is capable of reducing a size and current consumption by commonly using a data output control unit for a plurality of data output units. The data output circuit includes a data output control unit for receiving an external clock signal and generate clock pulses having a pulse width, a first data output unit for outputting first data in synchronization with the clock pulse, and a second data output unit for outputting second data in synchronization with the clock pulses.