Shared Ferroelectric Fe-FET Pair for Compact Differential Memory
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Solution Overview
Problem
Ferroelectric field-effect transistors (Fe-FET) based memory devices face challenges in achieving a compact differential pair structure for reading, as traditional methods consume more area and require complementary write operations.
Innovation Solution
A compact differential pair Fe-FET structure is designed with a ferroelectric layer shared between two transistors, allowing for complementary states and enabling read and write operations in a single operation, similar to static random-access memory (SRAM).
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If a traditional differential pair structure is used for Fe-FET memory, then reading capability is achieved, but area consumption increases and complementary write operations are required
Solution Approach 1:
The patent merges two separate Fe-FET transistors into a single integrated structure where they share a common ferroelectric layer and substrate. This consolidation reduces the overall area consumption while maintaining the differential pair functionality needed for reading operations. The shared ferroelectric layer eliminates the need for separate write operations on two distinct devices, simplifying the write process.
Solution Approach 2:
The common ferroelectric layer serves multiple functions simultaneously: it provides non-volatile memory storage for both transistors, enables differential reading through shared polarization states, and facilitates simplified write operations through unified control. This multi-functionality reduces both area consumption and operational complexity.
2Reliability
If Fe-FET based memory is implemented, then non-volatile storage capability is achieved, but compact differential pair structure for reading is not realized
Solution Approach 1:
By combining two Fe-FET transistors into a single structure with a shared ferroelectric layer, the patent reduces structural complexity while preserving the non-volatile storage capability. The unified design maintains the differential pair functionality needed for reliable reading operations without requiring separate, complex structures for each transistor.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for efficient and compact non-volatile memory operations, reducing area consumption and enabling differential reading, while maintaining high endurance and low power consumption.
Implementation Method 1
Non-volatile memory based on ferroelectric field-effect transistor (Fe-FET) is one promising candidate for the next generation non-volatile memory technology
Data Source
AI summary
A semiconductor includes a ferroelectric layer, a first semiconductor layer, a first gate, a second semiconductor layer, a second gate and contact structures. The ferroelectric layer has a first surface and a second surface opposite to the first surface. The first semiconductor layer is disposed on the first surface of the ferroelectric layer. The first gate is disposed on the first semiconductor layer over the first surface. The second semiconductor layer is disposed on the second surface of the ferroelectric layer. The second gate is disposed on the second semiconductor layer over the second surface. The contacts structures are connected to the first semiconductor layer and the second semiconductor layer.