Shared-Gate Transistor Layout for Faster Sub-Word Line Driving
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Solution Overview
Problem
Semiconductor memory devices face speed delays due to increased memory cells connected to word lines, leading to inefficiencies in voltage distribution, and existing methods for addressing these delays are inadequate in managing defective drains and preventing gate oxide layer bursting.
Innovation Solution
The implementation of transistor units with a shared gate structure, featuring an active area divided by a separation area and a gate with an inverted pi () shape, which separates and manages repairs while maintaining a long channel length and preventing gate oxide layer bursting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If one word line is divided into multiple sub-word lines to address speed delay, then voltage distribution speed is improved, but device complexity increases due to multiple sub-word line drivers
Solution Approach 1:
Two transistors share a common gate structure and common source area, merging functional elements to reduce overall device complexity while maintaining the sub-word line driver architecture for improved voltage distribution speed
2Reliability
If channel length is increased to reduce short channel effect, then transistor control is improved, but area occupied by transistor increases
Solution Approach 1:
The active area extends in multiple directions (first direction for body length, second direction for protrusion), allowing the channel length to be increased along one dimension while the overall footprint is optimized through the T-shaped configuration
3Productivity
If gate oxide layer thickness is reduced to increase transistor density, then device integration is improved, but gate oxide layer becomes prone to bursting
Solution Approach 1:
The gate structure is designed with different configurations in different regions: it covers the channel area for proper transistor operation but exposes the top of the active area at the channel-avoidance region to prevent field concentration and gate oxide layer bursting
4Ease of repair
If separation area is introduced to divide active area for defect management, then repair manageability is improved, but manufacturing complexity increases
Solution Approach 1:
The active area is divided into first and second active areas by the separation area, which extends through the body and separates the protrusion into two parts, enabling independent repair management of defective drains while maintaining a relatively simple T-shaped overall structure
Data Source
AI summary
A transistor with a shared gate structure includes an active area and a gate. The active area has a body extending in a first direction on a substrate, and a protrusion extending in a second direction perpendicular to the first direction from a central portion of the body in the first direction. The gate is arranged above the active area to overlap a channel area of the active area, and has an inverted pi (II) structure that, from a plan view, surrounds on three sides but does not cover a portion of the active area that includes two corner portions of the active area. The active area is divided into a first active area and a second active area by a separation area extending in the second direction and separating the body and a portion of the protrusion. The protrusion is divided into a first portion separated into two sub-portions by the separation area and a second portion, wherein the first portion is between the body and the second portion in the second direction. Opposite ends of the body in the first direction corresponding to two drain areas, the second portion of the protrusion corresponding to a common source area, and the gate constitute two transistors, wherein the two transistors share the gate.