Shared N-Well CMOS Layout for Compact High-Voltage Switches
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Solution Overview
Problem
Conventional high-voltage semiconductor switches require separate doping areas and body bias terminals for PMOS and NMOS transistors, leading to increased area usage due to physical spacing, which is undesirable for high integration density.
Innovation Solution
A semiconductor device design where the body bias of the PMOS transistor is shared or merged with the N-type active region of the NMOS transistor, eliminating the need for separate body bias terminals and reducing the overall area by integrating the body bias function within the NMOS transistor's active region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate doping areas and body bias terminals are used for PMOS and NMOS transistors, then the body bias function is properly implemented, but the device area increases due to physical spacing requirements
Solution Approach 1:
The patent merges the body bias terminal of the PMOS transistor with the source terminal of the NMOS transistor by forming a shared N-type active region. This single continuous active region serves dual purposes: as the source of the NMOS transistor and as the body bias terminal for the PMOS transistor, thereby eliminating the need for separate doping areas and reducing overall device area while maintaining proper body bias functionality
Solution Approach 2:
The shared N-type active region performs multiple functions simultaneously: it acts as the source terminal for the NMOS transistor, provides the body bias terminal for the PMOS transistor, and establishes proper electrical connections between the two transistors. This multi-functional design reduces the number of separate components needed and minimizes device footprint
2Adaptability or versatility
If PMOS and NMOS transistors are physically spaced apart with separate doping areas, then each transistor has dedicated body bias control, but integration density decreases
Solution Approach 1:
The patent combines the body bias control function with the NMOS source terminal by creating a shared N-type active region that serves both transistors. This merging allows proper body bias control to be maintained while significantly improving integration density by eliminating wasted space between separately spaced transistors
Data Source
AI summary
A semiconductor device includes a substrate, an N-well area formed in the substrate, a first P-channel metal oxide semiconductor (PMOS) transistor having active regions formed in the N-well area, and a first N-channel metal oxide semiconductor (NMOS) transistor having active regions formed in the substrate. The first NMOS transistor includes a first N-type active region overlapping each of the substrate and the N-well area, when viewed from above a plane parallel to a top surface of the substrate.