3D Shared-Plate FeRAM Layout for Higher Memory Density

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Solution Overview

Problem

Current random-access memory (RAM) devices, particularly ferroelectric RAM (FeRAM), face challenges in achieving higher density and lower volatility while maintaining cost-effectiveness, which limits their performance and scalability in complex systems.

Innovation Solution

The solution involves designing memory devices with a shared common plate and separate outer plates for capacitors, using ferroelectric materials with high relative permittivity, and implementing non-planar transistors with small channel dimensions, along with active cooling systems to reduce leakage currents and enable smaller component sizes, thereby increasing memory density and reducing system temperatures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional RAM structures are used, then device complexity is manageable, but memory density cannot be increased sufficiently

Engineering Contradiction:
Improvememory densityVSAvoiddevice complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

Multiple capacitors share a common first plate, merging what would traditionally be separate capacitor structures into a shared architecture. This allows multiple storage elements to be accessed through a single access transistor, increasing memory density while managing device complexity through resource sharing

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from planar capacitor arrangements to three-dimensional stacked capacitors with common plates extending vertically. By utilizing the vertical dimension and stacking capacitors above and below the access transistor, memory density is dramatically increased without proportionally increasing lateral device complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If component sizes are reduced to increase density, then memory density improves, but leakage currents increase

Engineering Contradiction:
Improvememory densityVSAvoidleakage currents
Core Design Contradiction:
Quantity of substanceVSLoss of energy

Solution Approach 1:

The patent employs ferroelectric materials with high relative permittivity to change the electrical parameters of the capacitor dielectric. This allows smaller capacitor dimensions to achieve the same capacitance values, increasing memory density while the ferroelectric properties maintain stable charge storage and reduce leakage currents through their non-volatile characteristics

Inventive Principle:
Principle #35Parameter changes

3Loss of energy

If active cooling is implemented to reduce leakage, then leakage currents decrease, but system complexity increases

Engineering Contradiction:
Improveleakage currentsVSAvoidsystem complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The ferroelectric materials inherently provide non-volatile charge storage and reduced leakage currents through their material properties, eliminating the need for external active cooling systems. The material itself serves the function of maintaining stable operation without requiring additional cooling infrastructure, thereby reducing system complexity while achieving low leakage currents

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances memory density, reduces leakage currents, and allows for smaller component sizes, leading to improved system performance and cost-effectiveness by increasing the storage capacity within the same lateral area while maintaining low operating temperatures.

Implementation Method 1

a cooling structure capable of removing heat from the IC die to lower the operating temperature of the memory device

Methodology Applied
Scientific EffectHeat removal: Cooling

Implementation Method 2

forming capacitor structures with high-k dielectric materials and shared common plates

Methodology Applied
Scientific EffectDielectric permittivity: Dielectric Permittivity

Data Source

PatentUS20240008285A1Backside reveal for layered multi-capacitor single transistor memory systems
Publication Date: 2024.01.04 INTEL CORP
  • US20240008285A1 patent drawing
  • US20240008285A1 patent drawing
  • US20240008285A1 patent drawing

AI summary

Bits are stored in an array with multiple capacitors sharing a single access transistor and a common plate coupled to the transistor. A single common select transistor accesses information stored in an array of capacitors, above and below the transistor and sharing a common plate. The common plate may be vertical and encircled by each of the other plates. The capacitors may be ferroelectric capacitors. In an integrated circuit system, the array may be coupled to a power supply and a cooling structure.