Shared Redundancy Memory Unit for Semiconductor Devices
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Solution Overview
Problem
Semiconductor memory devices face inefficiencies in redundancy operations due to excessive use of redundancy memory units, leading to degraded performance and high-speed sensing issues when defective cells occur, especially when cells in low-byte and high-byte main memory units have the same address.
Innovation Solution
A semiconductor memory device design where a low-byte main memory unit and a high-byte main memory unit share a redundancy memory unit, utilizing data transmitters to control connections between memory units and redundancy memory units, enabling efficient redundancy operations and reducing resistance-related speed degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate redundancy memory units are provided for low-byte and high-byte main memory units, then each memory unit can independently repair defective cells, but the redundancy memory units may be excessively used and cannot program data any longer, degrading redundancy efficiency
Solution Approach 1:
The patent merges separate redundancy memory units for low-byte and high-byte main memory units into a shared redundancy memory unit. This allows the redundancy resources to be pooled and shared between both memory units, preventing excessive use of dedicated redundancy units and maintaining their ability to program data while still providing repair capability for defective cells.
Solution Approach 2:
The shared redundancy memory unit is designed to serve multiple functions: it can repair defective cells in both low-byte and high-byte main memory units, and it can also program data when not needed for repair operations. This multi-functionality resolves the contradiction by making the redundancy unit versatile rather than dedicated to a single purpose.
2Reliability
If redundancy memory units are excessively used for repairing defective cells, then more defective cells can be repaired, but the redundancy memory units cannot program data any longer and may not be connected to respective data lines
Solution Approach 1:
The patent implements dynamic allocation of the shared redundancy memory unit between repair operations and data programming operations. The system can switch the functionality of the redundancy unit based on current needs - using it for repairing defective cells when required, and for programming data when no repair operations are needed, thus maintaining both capabilities without permanent degradation.
3Reliability
If low-byte and high-byte main memory units use different I/O data lines, then data can be communicated through separate lines, but many defective cells may occur in either unit and one redundancy unit is used excessively
Solution Approach 1:
The shared redundancy memory unit is designed to interface with both low-byte and high-byte main memory units through their respective I/O data lines. This universal interface capability allows the single redundancy unit to serve both memory units, improving redundancy utilization efficiency while maintaining the ability to communicate with both data line sets.
Data Source
AI summary
A semiconductor memory device and a memory system including the same are provided. The semiconductor memory device includes a first memory unit and a plurality of second memory unit, each including a plurality of memory cells and page buffers corresponding to the memory cells, and a redundancy memory unit including a plurality of redundancy memory cells and a plurality of redundancy page buffers corresponding to the redundancy memory cells. First input/output (I/O) data lines coupled to the first memory unit and second I/O data lines coupled to the second memory unit are coupled to the redundancy memory unit.