Shared Reference Cell Architecture for Resistive Memory Sense Amplifiers
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Solution Overview
Problem
Resistive memory devices, such as ReRAMs, face large read error rates due to uncontrollable variations in reference cells, which are necessary for comparing cell currents during data read operations, leading to inaccuracies in determining the logic state of stored data.
Innovation Solution
The solution involves coupling the terminals of sense amplifiers together to share a reference cell, merging current paths, and implementing multiplexers to select one of multiple reference cells, reducing current and voltage sensing variations, and providing multiple choices for reference cells to minimize resistance variations, thereby reducing the IO-to-IO variations and integrated circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external reference cells are used for generating reference currents, then data readout is enabled, but large uncontrollable variation occurs leading to large read error rate
Solution Approach 1:
The patent merges multiple reference cells into a single shared reference cell that serves multiple sense amplifiers. This consolidation reduces the total number of reference cells from N (one per sense amplifier) to 1 (shared by all N sense amplifiers), thereby reducing manufacturing variations and improving reference current accuracy across all sense amplifiers.
Solution Approach 2:
The shared reference cell performs multiple functions by serving as the reference for all N sense amplifiers simultaneously. Instead of each sense amplifier having its own dedicated reference cell, the single reference cell is universally used across the entire array, reducing component count and variation.
2Reliability
If multiple reference cells are used for each sense amplifier, then reference current availability is improved, but device area increases
Solution Approach 1:
The patent combines multiple reference cells into a single shared reference structure that serves all sense amplifiers. This merging reduces the total area occupied by reference cells from N separate cells to 1 shared cell, while maintaining reference current stability through the shared architecture.
Solution Approach 2:
The shared reference cell structure provides universal reference current to all sense amplifiers, eliminating the need for multiple dedicated reference cells. This multi-functional approach reduces the integrated circuit area while maintaining reliability.
3Measurement precision
If separate reference cells are allocated to each sense amplifier, then reference current precision is maintained, but manufacturing variation increases
Solution Approach 1:
The patent merges all reference cells into a single shared reference cell structure. This consolidation ensures that all sense amplifiers use the exact same reference cell, eliminating manufacturing variations between different reference cells and improving reference current precision across the entire array.
Data Source
AI summary
A memory device is provided. The memory device includes several sense amplifiers and at least one reference cell. Each of the sense amplifiers has a first terminal and a second terminal. The first terminals of the sense amplifiers are coupled to a memory cell block, and the second terminals of the sense amplifiers are coupled together to transmit a read current. The at least one reference cell transmits the read current to a ground terminal. The at least one reference cell has a decreased resistance value when a number N of the sense amplifiers increases.