Shared Repair Circuit for Memory Bank Word Line Failure
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Solution Overview
Problem
Conventional memory apparatuses face operational failures due to excessive word line failures in integrated manufacturing, where the number of failed word lines exceeds the redundant array capacity, leading to incomplete repair and resulting in the entire memory apparatus being classified as a bad product.
Innovation Solution
A memory apparatus with a row decoder and repair circuit that generates a shared repair signal to dynamically replace failed word lines between adjacent memory banks, utilizing redundant arrays from one bank to support the other, ensuring all failed word lines are repaired and the apparatus operates normally.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the number of redundant word lines is increased to repair more failed word lines, then the repair capability is improved, but the memory bank capacity is reduced and device complexity increases
Solution Approach 1:
The patent merges the redundant arrays of two adjacent memory banks into a shared repair resource. The second memory bank's redundant array is used to repair failed word lines in the first memory bank, allowing the first bank to achieve higher repair capability without increasing its own redundant array size or reducing its operational capacity.
Solution Approach 2:
The redundant array of the second memory bank serves multiple functions: it repairs failed word lines in the second bank's own normal array, and simultaneously repairs failed word lines in the first memory bank. This multi-functional use maximizes the repair capability without proportionally increasing the redundant resources.
2Reliability
If the number of redundant word lines is increased to repair more failed word lines, then the repair capability is improved, but the manufacturing cost increases
Solution Approach 1:
The patent combines the redundant resources of two memory banks into a shared pool, allowing the system to repair more failed word lines without proportionally increasing the total number of redundant word lines manufactured. This shared approach reduces the overall manufacturing cost compared to providing separate redundant arrays for each bank.
Solution Approach 2:
The system dynamically allocates redundant word lines from the second memory bank to repair failed word lines in the first memory bank based on actual failure patterns. This dynamic sharing allows the system to adapt to different failure scenarios without requiring excessive redundant resources to be manufactured in advance.
3Adaptability or versatility
If separate repair circuits are provided for each memory bank, then the repair independence is improved, but the device complexity and cost increase
Solution Approach 1:
The patent merges the repair circuit functionality into a shared resource between two memory banks. The row decoder and repair circuit of the second memory bank are used to repair failed word lines in both the first and second memory banks, eliminating the need for separate repair circuits in each bank and reducing overall device complexity.
Solution Approach 2:
The row decoder and repair circuit serve multiple functions: they decode row addresses for the second memory bank and simultaneously repair failed word lines in both the first and second memory banks. This multi-functional design reduces the total circuit complexity while maintaining repair capabilities for both banks.
Data Source
AI summary
A memory apparatus includes a first memory bank, a second memory bank, a row decoder and repair circuit, and an input/output driver controller. The row decoder and repair circuit is coupled to the first and second memory banks in common. The row decoder and repair circuit generates a shared repair signal according to whether a word line disposed in a first memory bank is replaced with a word line disposed in a second memory bank. The input/output driver controller allows read or write operations for one of the first and second memory banks to be performed based on the shared repair signal and an operation signal.