Shared SAR DAC Architecture for Delta-Sigma Loop Delay Compensation
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Solution Overview
Problem
Delta-sigma analog-to-digital converters (ADCs) face performance degradation due to excess loop delay, which is exacerbated by the area and power consumption of existing excess loop delay compensation methods, particularly in continuous time delta-sigma ADCs used in audio and medical devices.
Innovation Solution
The implementation of a method that reduces total capacitance in an embedded excess loop delay compensation digital-to-analog converter (DAC) by moving the compensation to a capacitive domain, integrating it with the successive approximation register (SAR) operation, and digitally controlling the gain of the excess loop delay DAC to calibrate gain mismatches, thereby reducing power consumption and maintaining stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If excess loop delay compensation is implemented in continuous time delta-sigma ADCs, then performance is improved, but power consumption and area increase
Solution Approach 1:
The patent merges the excess loop delay compensation DAC with the main SAR DAC by sharing the same capacitor array. The compensation DAC and main DAC use the same physical capacitors but operate at different times (different phases), eliminating the need for separate compensation capacitors and reducing overall power consumption and area.
Solution Approach 2:
The patent implements periodic action by alternating between compensation phase and conversion phase using the same capacitor array. During the compensation phase, the capacitors are used for excess loop delay compensation; during the conversion phase, they are used for the main SAR conversion. This time-division multiplexing reduces power consumption and area while maintaining performance.
2Reliability
If excess loop delay compensation is implemented in continuous time delta-sigma ADCs, then performance is improved, but area increases
Solution Approach 1:
The patent merges the excess loop delay compensation DAC with the main SAR DAC by sharing the same capacitor array. The compensation DAC and main DAC use the same physical capacitors but operate at different times (different phases), eliminating the need for separate compensation capacitors and reducing overall area.
Solution Approach 2:
The capacitor array serves multiple functions: it acts as the main SAR DAC capacitors during conversion phase and as the compensation DAC capacitors during compensation phase. This multi-functionality eliminates the need for dedicated compensation capacitors, reducing total area while maintaining both conversion and compensation functions.
3Reliability
If separate compensation DAC is used, then excess loop delay is compensated, but gain mismatch occurs between main DAC and compensation DAC
Solution Approach 1:
The patent merges the compensation DAC and main SAR DAC into a single unified DAC structure using the same capacitor array. This eliminates the gain mismatch problem that occurs between separate DACs, as there is only one DAC with consistent gain characteristics throughout the conversion process.
Data Source
AI summary
Systems and methods are provided for increasing efficiency of excess loop delay compensation in delta-sigma analog-to-digital converters. In some examples, systems and methods are provided for reducing total capacitance in an embedded excess loop delay compensation digital-to-analog converter (DAC) in a quantizer for a continuous time delta-sigma ADC. In other examples, the excess loop delay compensation DAC can be a current domain DAC, a charge domain DAC, or a voltage domain DAC. Additionally, methods are provided for digitally controlling the gain of an excess loop delay DAC. Furthermore, methods are provided to calibrate a gain mismatch between a main successive approximation register DAC and an excess loop delay DAC. The systems and methods provided herein improve performance of continuous time delta-sigma ADCs. Continuous time delta-sigma ADCs are high precision and power efficient ADCs, often used in audio playback devices and medical devices.