Multi-Bit Flip-Flop Layout With Shared Scan Input Paths
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Solution Overview
Problem
Current multi-bit flip-flops face challenges in design efficiency and testability due to the need for multiple scan input pins, which increases circuit complexity and power consumption, especially when implementing scan test modes.
Innovation Solution
A multi-bit flip-flop design that incorporates a single scan input pin and connects the scan paths of two scan flip-flops, allowing for selection between data and scan input signals based on a scan enable signal, reducing the number of pins and improving circuit design freedom while maintaining testability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple scan input pins are used for multi-bit flip-flops, then testability is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent combines multiple scan input pins into a single scan input pin that serves multiple flip-flops. The single scan input signal is distributed to multiple scan flip-flops through shared scan paths, reducing the total number of pins while maintaining scan test functionality across all flip-flops in the multi-bit flip-flop structure.
Solution Approach 2:
The single scan input pin is designed to universally control multiple scan flip-flops simultaneously. This multi-functional pin can initialize and test all flip-flops in the structure, replacing the need for dedicated scan input pins for each individual flip-flop, thereby reducing device complexity while preserving testability.
2Reliability
If multiple scan input pins are used for multi-bit flip-flops, then testability is improved, but power consumption increases
Solution Approach 1:
By merging multiple scan input pins into a single shared scan input pin, the patent reduces the number of active signal sources. This single pin can initialize and test multiple flip-flops sequentially or simultaneously through the shared scan path, thereby reducing overall power consumption while maintaining comprehensive test coverage.
3Adaptability or versatility
If multiple scan input pins are used, then scan test operations are more independent, but circuit complexity increases
Solution Approach 1:
The patent segments the scan functionality into multiple independent scan flip-flops that share a common scan input pin. Each scan flip-flop maintains its own data path and can be individually controlled through the shared scan path, allowing independent scan test operations while avoiding the complexity of multiple separate pin connections.
Data Source
AI summary
A multi-bit flip-flop includes: a single scan input pin to receive a scan input signal, a plurality of data input pins to receive first and second data input signals, a first scan flip-flop to select one of the scan input signal and the first data input signal as a first selection signal in response to a scan enable signal and to latch the first selection signal to provide a first output signal, a second scan flip-flop to select one of an internal signal corresponding to the first output signal and the second data input signal as a second selection signal in response to the scan enable signal and to latch the second selection signal to provide a second output signal, and a plurality of output pins to output the first and second output signals, wherein scan paths of the first and second scan flip-flops are connected to each other.