Shared-Select Multiplexer Circuit for FPGA Logic Expansion
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Solution Overview
Problem
Conventional field programmable gate arrays (FPGAs) require a large number of logic elements and extensive routing resources for operations like shifts, gating, and signal selection, which reduces available resources for user designs and other functions.
Innovation Solution
A programmable circuit using a plurality of multiplexers performs operations such as bypass, shift, selection, and logical operations on signals, expanding the functionality of logic elements and increasing available resources by sharing a select line among multiplexers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional FPGAs use logic elements and programmable routing to perform operations such as shifts, gating, and signal selection, then these operations can be implemented, but a large number of logic elements and extensive routing resources are consumed, reducing available resources for user designs
Solution Approach 1:
The patent makes logic elements universal by enabling them to perform multiple functions. A single logic element can operate as a standard logic element or be configured to perform shift, gate, or signal selection operations by programming its associated multiplexer. This eliminates the need for separate dedicated circuits for each operation type, thereby preserving logic element resources while maintaining full operational capability
Solution Approach 2:
The patent introduces dynamic reconfigurability where the function of each logic element can be changed at runtime through multiplexer programming. The multiplexers allow the logic element outputs to be dynamically routed to different destinations or combined in different ways, enabling the same physical logic elements to adapt their behavior and function based on operational requirements rather than being fixed in a single purpose
2Productivity
If conventional FPGAs allocate logic elements to perform operations like shifts and gating, then these operations are performed, but the number of available logic elements for user designs is reduced
Solution Approach 1:
The patent merges the operation performance function with the existing logic element infrastructure. Instead of allocating separate logic elements for shifts, gating, and selection operations, the patent combines these functions with the standard logic elements by adding multiplexers that can route logic element outputs to perform these operations. This merging approach maintains operation performance while reducing the total number of logic elements required
Data Source
AI summary
Operation of a programmable circuit is described. A circuit including a plurality of multiplexers may be used to perform at least one operation on a plurality of signals. The at least one operation may be performed by the multiplexers using a select line coupled to or shared by the multiplexers. Each input of the circuit may couple to a respective output of a plurality of logic elements. As such, the circuit may be used to perform at least one operation on signals supplied from a plurality of logic elements, thereby expanding the functionality of at least one logic element coupled to the circuit and/or increasing the number of logic elements and other resources available for implementing user designs or performing other functions.