Shared Selection Circuit for Resistive Memory Write and Read Operations
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Solution Overview
Problem
Existing memory circuit devices configured with LIM technology face challenges in further downsizing, particularly when incorporating multiple memory cells with functions like lookup tables that require both write and read circuits, leading to increased circuit size.
Innovation Solution
A memory circuit device with shared selection and control circuits for both write and read operations, allowing data to be written or read based on cell designating information using a single selection circuit unit, enabling efficient data shifting and calculation functions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a memory circuit device incorporates multiple memory cells with both write and read circuit units, then the device can perform calculation functions (LUT), but the circuit size increases
Solution Approach 1:
The patent merges the selection circuit units for both write and read operations into a single shared unit. The selection circuit unit receives cell designating information and generates selection signals that are used by both the write circuit unit to write data to and the read circuit unit to read data from the designated memory cell, eliminating redundancy and reducing circuit size while maintaining full write and read functionality
Solution Approach 2:
The shared selection circuit unit performs multiple functions: it selects memory cells for write operations, selects memory cells for read operations, and generates selection signals for both write and read circuit units. This multi-functional design reduces the overall circuit complexity and area occupation
2Ease of operation
If separate selection circuit units are provided for write and read operations, then each circuit unit can operate independently, but the transistor count and circuit complexity increase
Solution Approach 1:
The patent combines separate selection circuit units into a single shared unit that serves both write and read operations. The selection circuit unit generates selection signals that are distributed to both the write circuit unit and read circuit unit, maintaining independent operational capability while reducing transistor count and circuit complexity
3Area of stationary object
If LIM circuit technology is used to integrate memory and calculation functions, then circuit size is reduced, but further downsizing is difficult when multiple memory cells are involved
Solution Approach 1:
The shared selection circuit unit is designed to handle multiple memory cells efficiently. It receives cell designating information that identifies specific memory cells and generates appropriate selection signals for both write and read operations across multiple cells, enabling scalable multi-cell operation without proportionally increasing circuit size
Data Source
AI summary
A memory circuit device includes multiple memory cells that are each constituted of a resistive memory element, a write circuit unit that is configured to write data to any one of the memory cells which is designated by cell designating information, and a read circuit unit that is configured to read out, from the memory cell designated by the cell designating information, data written in the memory cell. The memory circuit device has a configuration including a selection circuit unit that is shared by both of the write circuit unit and the read circuit unit and configured to select a memory cell to be activated from the multiple memory cells based on the cell designating information, and a control circuit unit that is configured to selectively enable any one of writing of data by the write circuit unit and reading of data by the read circuit unit with respect to the memory cell selected by the selection circuit unit.