Shared SRAM Sleep Regulator Isolating Sub-Banks
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Solution Overview
Problem
Existing SRAM sleep mode regulators require multiple amplifiers for each sub-array, leading to space and power constraints, and struggle to maintain data retention during transitions between sleep and wake modes due to voltage fluctuations and undershoot.
Innovation Solution
A shared integrated regulator system that isolates sub-banks during access, uses a single amplifier to manage voltage across multiple SRAM sub-banks, and employs a feedback loop to maintain a stable sleep voltage, minimizing undershoot and allowing for fine-grained sleep sub-bank management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple amplifiers are provided for every sub-array to independently revive each section, then reliability of voltage control is improved, but device complexity and power consumption increase significantly
Solution Approach 1:
The patent merges multiple amplifier functions into a single shared amplifier that can serve multiple sub-arrays. The amplifier is time-multiplexed across different sub-arrays, where one sub-array is activated at a time. This eliminates the need for separate amplifiers for each sub-array while maintaining the ability to independently control voltage for each section when needed.
Solution Approach 2:
The patent introduces dynamic switching mechanisms that allow the single amplifier to be dynamically assigned to different sub-arrays based on which section needs voltage revival. The system dynamically transitions between serving different sub-arrays, enabling flexible and efficient resource utilization without requiring static dedicated amplifiers for each section.
2Reliability
If multiple amplifiers are provided for every sub-array, then voltage control reliability is improved, but power consumption increases
Solution Approach 1:
The patent combines multiple amplifier functions into a single shared amplifier that is time-multiplexed across different sub-arrays. This merging approach eliminates redundant amplifier circuits that would consume power continuously, while maintaining the ability to provide reliable voltage control to any active sub-array when needed.
Solution Approach 2:
The single amplifier operates in a periodic manner, serving different sub-arrays in sequence rather than continuously. This periodic operation pattern allows the amplifier to be activated only when a specific sub-array needs voltage revival, significantly reducing overall power consumption compared to having multiple amplifiers operating simultaneously or continuously.
3Reliability
If bypass capacitance is used to mitigate voltage undershoot during wake operations, then data retention reliability is improved, but area consumption increases
Solution Approach 1:
The patent extracts the voltage undershoot mitigation function from the traditional bypass capacitance approach and relocates it to the amplifier control mechanism. By using the amplifier's feedback circuitry and control logic to actively compensate for voltage drops during wake operations, the system eliminates the need for large bypass capacitance structures, thereby maintaining data retention reliability without the area penalty.
Data Source
AI summary
Embodiments are described for a method for regulating sleep mode of a plurality of sub-banks in an SRAM array by isolating all of the sub-banks from a regulator upon access to at least one sub-bank that causes the accessed sub-bank to go to an operating voltage, and isolating the accessed sub-bank from non accessed sub-banks, while maintaining a sleep voltage on a load memory array and each of the sub-banks through the regulator; comparing a voltage on the non accessed sub-banks to a voltage output of the regulator; and providing a sleep voltage level to all of the sub-banks through the regulator when the voltage on the non accessed sub-banks is less than the sleep voltage.