Shared Epitaxial Transistor Structure for High Density
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As device and circuit density increases, existing semiconductor structures struggle to efficiently design and fabricate multi-purpose semiconductor structures that can function as multiple devices, limiting device density and circuit functionality.
Innovation Solution
A semiconductor structure is fabricated with shared epitaxial layers to form two transistors, where the emitter and base of one transistor also serve as the collector and base of another, allowing for the creation of both laterally and vertically extending transistors within the same structure, utilizing n+ and p+ semiconductor layers and etching techniques to define the transistor portions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional separate transistor structures are used, then each transistor can be independently fabricated, but device density and circuit functionality are limited
Solution Approach 1:
The patent merges two transistor structures by making the emitter of the first transistor also serve as the base of the second transistor, and the base of the first transistor also serve as the collector of the second transistor. This sharing of common regions between transistors increases device density while maintaining independent functionality of each transistor.
Solution Approach 2:
The patent creates multi-functional semiconductor regions where the same physical structure serves multiple purposes: the emitter region of the first transistor also functions as the base region of the second transistor, and the base region of the first transistor also functions as the collector region of the second transistor. This universal usage of regions improves device density without proportionally increasing fabrication complexity.
2Productivity
If multi-purpose semiconductor structures are designed to increase device density, then multiple devices can be fabricated within a single structure, but fabrication process complexity increases
Solution Approach 1:
The patent segments the semiconductor structure into distinct doped regions (emitter, base, collector regions for each transistor) that can be independently defined through selective etching and doping processes. This segmentation allows multiple transistors to be formed from shared layers through controlled regional modification, managing fabrication complexity while achieving high device density.
Solution Approach 2:
The patent utilizes vertical layering of semiconductor epitaxial layers to create multiple transistors in a three-dimensional configuration. By stacking n+ and p+ doped layers vertically and using selective etching to define horizontal regions, the structure achieves high device density through vertical integration rather than only horizontal expansion.
Data Source
AI summary
A semiconductor structure is fabricated with two different portions. The first portion forms a first transistor, while the second portion forms a second transistor. Notably, portions of the first transistor also a make up portions of the second transistor. That is, both the first transistor and the second transistor are made of portions of the same structure.