Shift Register Pre-Charging Circuit Power Reduction
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Solution Overview
Problem
Conventional dynamic shift registers used in LCD devices consume high power and occupy larger layout areas, necessitating a solution for reducing power consumption and layout area while maintaining high speed.
Innovation Solution
A shift register design incorporating a pre-charging switch, level shifting switch, output generator, and level compensating capacitor, along with a controller that includes inverters and sampling switches, to efficiently manage clock signals and voltage levels, reducing static current and transistor count.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a dynamic shift register is used to reduce layout area and increase speed, then the layout area is reduced and speed is improved, but power consumption increases due to static current
Solution Approach 1:
The patent implements periodic pre-charging of the output node using a pre-charging transistor that is activated during specific clock phases. This periodic action ensures the output node is ready for rapid switching while allowing the circuit to enter low-power states between charging cycles, thus maintaining high speed operation while reducing overall power consumption compared to continuous dynamic operation
Solution Approach 2:
The patent performs preliminary pre-charging of the output node before the actual switching operation occurs. By pre-charging the output node during the clock high phase and then rapidly discharging it during the clock low phase, the circuit prepares the output in advance for the next switching event, enabling faster operation while the pre-charging transistor remains off during the discharge phase to minimize static current
2Reliability
If a static shift register with flip-flops is used to ensure steady operation, then reliability is improved, but layout area increases due to large number of transistors
Solution Approach 1:
The patent divides the shift register functionality into segmented stages, where each stage consists of a minimal set of transistors (input transistor, output transistor, and pre-charging transistor) rather than using complete flip-flop circuits. This segmentation allows each stage to perform its function with fewer transistors while maintaining reliable operation through the coordinated action of clock signals and pre-charging mechanisms
Solution Approach 2:
The patent extracts the essential functionality needed for shift register operation (voltage level shifting and signal propagation) from the complete flip-flop structure. By removing unnecessary components and keeping only the critical elements required for reliable operation, the design achieves steady performance with significantly reduced transistor count and layout area
3Productivity
If more transistors are used in the shift register to improve functionality, then reliability and speed are improved, but layout area increases
Solution Approach 1:
The patent designs each transistor to perform multiple functions: the input transistor serves as both the switching element and the level-shifting element, the output transistor functions as both the drive element and the pre-charging element when combined with the pre-charging transistor, and the pre-charging transistor provides both pre-charging and level adjustment capabilities. This multi-functionality reduces the total transistor count while maintaining high-speed operation
Data Source
AI summary
A shift register is used for outputting an output pulse at output end in response to a delay of an input pulse received at an input end. The shift register includes a controller, a pre-charging switch, a level shifting switch, and an output generator. The controller is used for generating a level switching signal. The pre-charging switch is used for conducting a first supply voltage to a level shifting node in response to the input pulse. The level shifting switch turns on in response to the level switching signal. The output generator is used for generating the output pulse at the output end, when the level shifting switch turns on.


