In-Memory Computing Shift Restoration Circuit for Power Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In-memory computing apparatuses, particularly those using convolutional neural networks for image recognition, face high power consumption due to the large number of multiply-accumulate calculations and data movements.
Innovation Solution
The apparatus includes a memory array with a shifted weight storage area, a shift information storage area, and a shift unit amount storage area, where the shift restoration circuit restores weight shift amounts using the number of shift units and column shift unit amounts to generate restored sum-of-products, reducing current values on bit lines and power consumption during sum-of-products operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If traditional in-memory computing performs multiply-accumulate calculations with large data movement, then computation capability is achieved, but power consumption becomes excessively high
Solution Approach 1:
The patent segments the weight storage into multiple banks (first weight bank, second weight bank, etc.) and divides the computation into corresponding segments. Each bank stores weights with different shift amounts, allowing parallel computation of shifted sum-of-products. This segmentation enables power-efficient computation by distributing the computational load across multiple specialized storage units rather than moving all data through a single high-power pathway.
Solution Approach 2:
The patent pre-shifts the weight values during the storage phase, storing multiple versions of each weight with different shift amounts (e.g., W0-SF0, W0-SF1, W0-SF2) in different weight banks before computation is needed. This preliminary action eliminates the need for dynamic shifting during computation, reducing the computational complexity and power consumption of the multiply-accumulate operations while maintaining full computation capability.
2Loss of energy
If weight values are shifted to reduce current values on bit lines, then power consumption is reduced, but the accuracy of sum-of-products may be compromised
Solution Approach 1:
The patent changes the parameter of weight representation by storing multiple shifted versions of each weight value (different SF values) in different weight banks. The shift restoration circuit then restores the original weight values by reversing the shift operation using stored shift information. This parameter transformation allows the system to operate with reduced current values during computation while maintaining accuracy through restoration, effectively decoupling power consumption from computation accuracy.
Solution Approach 2:
The patent introduces shift information storage areas as intermediaries that record the shift amounts applied to each weight value. These intermediaries enable the shift restoration circuit to accurately recover the original weight values after computation by using the stored shift information to reverse the shifting operation. The intermediaries act as a bridge between the power-efficient shifted computation and the accuracy-requiring original value recovery.
Data Source
AI summary
An in-memory computing apparatus and a computing method thereof are provided. A memory array includes a shifted weight storage area that stores shifted weight values, a shift information storage area that stores the number of shift units, and a shift unit amount storage area that stores a shift unit amount. A shift restoration circuit restores a weight shift amount of a shifted sum-of-products according to the number of shift units of the shifted weight values and a column shift unit amount, so as to generate multiple restored sum-of-products.