Shift Wrapper Memory Redundancy Bypassing Defective Cells
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Solution Overview
Problem
Semiconductor memories are vulnerable to defects introduced during the manufacturing process, and existing technologies lack an efficient method to bypass defective memory elements while maintaining data integrity and order.
Innovation Solution
A memory module with a shift wrapper that interfaces between block inputs/outputs and regular and redundant cell lines, allowing for the selective engagement of redundant cell lines to bypass defective cells while maintaining the order in the word-line direction, using input and output switches with multiplexers controlled by enable signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundant memory elements are used to replace defective ones, then reliability is improved, but device complexity increases
Solution Approach 1:
The memory array is segmented into regular cell lines and redundant cell lines, with the shift wrapper dividing the mapping control into multiple switch stages. This segmentation allows defective portions to be isolated and replaced without affecting the entire memory structure, resolving the contradiction by enabling localized redundancy activation.
Solution Approach 2:
The shift wrapper acts as an intermediary component between the input/output interfaces and the memory array. It mediates the mapping relationship by introducing switch elements that can dynamically reroute signals, enabling defective cell lines to be bypassed while maintaining the overall memory structure integrity.
2Reliability
If mapping between inputs/outputs and cell lines is changed to bypass defective cells, then reliability is improved, but ease of operation deteriorates
Solution Approach 1:
The mapping configuration is made dynamic through the shift wrapper's ability to change its mapping pattern based on detected defects. The wrapper can shift between different mapping modes (identity mapping, shifted mapping, etc.) to adapt to various defect scenarios, automatically maintaining ease of operation while ensuring data integrity.
Solution Approach 2:
The shift wrapper incorporates automatic defect detection and self-configuration capabilities. When a defective cell line is detected, the system automatically activates the appropriate redundant cell line and adjusts the mapping without requiring manual intervention, thereby maintaining ease of operation while ensuring reliability.
3Reliability
If shift wrapper with multiple switches is used to bypass defective cell lines, then reliability is improved, but device complexity increases
Solution Approach 1:
Multiple switch elements within the shift wrapper are merged into a unified mapping control structure. The first and second switches work together as an integrated unit to handle the mapping between inputs/outputs and cell lines, reducing the overall structural complexity while maintaining the defect bypass capability.
Solution Approach 2:
The shift wrapper is designed with universal functionality to handle various defect scenarios using the same basic switch structure. The same switch elements can perform different mapping functions (identity mapping, shifted mapping, redundant cell line engagement) depending on the defect configuration, reducing the need for specialized components and thereby reducing overall device complexity.
Data Source
AI summary
Aspects of the disclosure provide a memory module including at least one memory block. The memory block includes a memory array and a shift wrapper. The memory array includes regular cell lines and at least a redundant cell line. The regular cell lines and the redundant cell line extend in a bit-line direction, and are ordered in a word-line direction. The shift wrapper interfaces between block inputs/outputs and the regular and redundant cell lines. The shift wrapper is configured to shift a mapping between the block inputs/outputs and the regular and redundant cell lines to bypass a defective cell line that has at least one defective cell, and engage the redundant cell line, while maintaining the order in the word-line direction.