Shifted Encoder A/D Conversion for Step Error Cancellation
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Solution Overview
Problem
In A/D conversion circuits with an odd number of pulse delay units, errors such as code missing and code increase occur due to the integration of step errors, leading to decreased accuracy and unemployable peripheral circuit configurations, especially when demanding high-speed operations.
Innovation Solution
The A/D conversion circuit employs a configuration where encode values from multiple encoders are synchronously sampled using successive sampling clocks, with each subtractor calculating differences between previous and current values, and an adder combining these results to output digital data related to the pulse signal's movement speed, while shifting encode values between encoders to minimize integrated step errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple encoders are used to increase measurement precision, then A/D conversion accuracy is improved, but step errors are integrated and accumulate, degrading the conversion result
Solution Approach 1:
Instead of adding encoder outputs directly which integrates errors, the patent inverts the approach by calculating differences between consecutive encoder outputs. This differential method cancels out common-step errors that would otherwise accumulate, transforming the error integration problem into an error cancellation solution
Solution Approach 2:
The patent implements feedback by using the previous encoder output as a reference for calculating the current conversion result. The difference between current and previous outputs is computed and fed back into the conversion process, allowing systematic elimination of repeating step errors through this closed-loop approach
2Productivity
If high-speed operations are performed to increase productivity, then conversion speed is improved, but errors occur more frequently, reducing reliability
Solution Approach 1:
The patent performs preliminary action by pre-calculating and storing previous encoder outputs before they are needed for the differential calculation. This preparation ensures that when high-speed conversion is required, the error-cancellation computation can proceed without delay, maintaining both speed and accuracy
Data Source
AI summary
An A/D conversion circuit converts an analog signal into numerical data. The A/D conversion circuit includes: a pulse delay circuit that includes an odd number of delay units connected in series, and inverting and delaying a pulse signal, and that changes the numeral number of the delay units which the pulse signal passes through in accordance with a value of the analog signal; latch circuits that synchronize the pulse signal with sampling clocks, and latch the pulse signal; encoders that set a position of the pulse signal to the numerical data by circulating encode values periodically set in order from an initial value to a final value to synchronously sample the encode values; subtractors that calculate each of differences between a previous value and a current value; and an adder that adds subtraction results. The encode values are set to be shifted between at least two encoders.