Shuffler ECC Layout for High-Error NAND Flash Pages
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Solution Overview
Problem
NAND flash storage devices experience varying bit-error rates across memory pages, leading to a higher occurrence of data bit errors in pages with higher page numbers, which existing error correction systems struggle to effectively correct due to limited error correction capacity.
Innovation Solution
A data storage system that stores error correction codes with higher error correction capacities in separate storage blocks for memory pages with higher bit-error rates, allowing for the use of additional error correction codes to correct data bit errors exceeding the initial error correction capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If error correction codes are stored in the same memory page as data, then storage efficiency is improved, but error correction capacity is limited
Solution Approach 1:
The error correction code is divided into two separate parts: a first error correction code unit stored in the same memory page as the data, and a second error correction code unit stored in a different memory page. This segmentation allows the system to maintain good storage efficiency while achieving higher overall error correction capacity by combining both code units.
2Reliability
If higher error correction capacity codes are used, then data reliability is improved, but storage space requirements increase
Solution Approach 1:
The system applies different error correction strategies to different memory pages based on their specific error characteristics. Memory pages with higher page numbers that exhibit higher bit error rates receive enhanced error correction through the second error correction code unit, while memory pages with lower error rates use only the first error correction code unit. This localized approach optimizes reliability where needed without unnecessarily increasing storage space requirements for all pages.
3Reliability
If error correction codes are stored in separate storage blocks, then error correction capacity is improved, but system complexity increases
Solution Approach 1:
The second error correction code unit stored in the different memory page serves multiple purposes: it provides additional error correction capacity for pages with high error rates, and can also function as a backup or enhanced protection layer for pages with lower error rates. This multi-functional design improves error correction capacity without proportionally increasing system complexity, as the same infrastructure serves multiple error correction needs.
Data Source
AI summary
A data storage device stores a data unit in a memory page of a storage block along with an error correction code unit for the data unit. Additionally, the data storage device stores an error correction code unit for the data unit in a memory page of another storage block. In various embodiments, one or both of the error correction code units form an error correction code for correcting data bit errors in the data unit. Because the memory page containing the data unit does not have a storage capacity for simultaneously storing the error correction code and the data unit, the data storage device is capable of correcting a greater number of data bit errors in the data unit by using the error correction code in comparison to using an error correction code that would fit in the memory page.