Si Regrowth Over Insulator for Monolithic III-N CMOS Integration

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Solution Overview

Problem

The challenge in large-scale implementation of III-N transistors lies in the absence of commercially viable low-voltage P-type metal-oxide-semiconductor (PMOS) transistors, limiting their applications and requiring separate chips for N-type metal-oxide-semiconductor (NMOS) and PMOS transistors, which increases the complexity and cost due to the need for multiple I/O pins.

Innovation Solution

The integration of Si-based semiconductor material stacks over an insulator material to form PMOS transistors on the same support structure as NMOS transistors, enabling monolithic integration of CMOS circuits with non-Si based transistors, such as III-N transistors, by semiconductor regrowth techniques.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If III-N transistors are used for high-frequency and high-voltage applications, then device performance is improved, but the absence of commercially viable low-voltage PMOS transistors limits their application and requires separate chips for NMOS and PMOS

Engineering Contradiction:
Improvedevice performanceVSAvoidmulti-chip package complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines NMOS and PMOS transistors on a single chip by integrating III-N based NMOS devices with Si-based PMOS devices. The Si-based semiconductor material stack is grown over an insulator material that is itself over the III-N semiconductor layer, allowing both transistor types to coexist on one substrate and eliminating the need for separate chips connected via I/O pins.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces an insulator material layer as an intermediary between the III-N semiconductor layer and the Si-based semiconductor material stack. This insulator layer enables the integration of different semiconductor materials (III-N and Si) on the same chip while providing electrical isolation and facilitating the formation of both NMOS and PMOS transistors in close proximity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If separate chips are used for NMOS and PMOS transistors, then fabrication simplicity is maintained, but the number of I/O pins increases compromising the solution viability

Engineering Contradiction:
Improvefabrication simplicityVSAvoidI/O pin complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent merges NMOS and PMOS transistor fabrication onto a single chip by growing Si-based semiconductor material over an insulator layer that sits on the III-N semiconductor substrate. This integration allows both transistor types to share the same chip package, dramatically reducing the number of I/O pins needed for inter-chip communication while maintaining separate fabrication processes for each transistor type.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If Si-based semiconductor material stack is integrated over insulator material, then monolithic integration of CMOS circuits is enabled, but fabrication process complexity increases

Engineering Contradiction:
ImproveCMOS circuit integrationVSAvoidfabrication process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The insulator material serves as a mediator that enables the integration of Si-based semiconductor material on top of the III-N semiconductor substrate. This intermediary layer facilitates the growth of Si-based material while maintaining electrical isolation, allowing CMOS circuit integration without requiring complete process redesign, thus balancing versatility gain with manageable process complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the fabrication of PMOS transistors alongside NMOS transistors on a single chip, reducing RF losses, costs, and complexity by sharing fabrication processes, and enabling more efficient high-frequency and high-voltage applications.

Implementation Method 1

The integration of Si-based semiconductor material stacks over an insulator material to form PMOS transistors on the same support structure as NMOS transistors, enabling monolithic integration of CMOS circuits with non-Si based transistors, such as III-N transistors, by semiconductor regrowth techniques.

Methodology Applied
Scientific EffectSemiconductor regrowth: Epitaxy

Data Source

PatentUS12148757B2Integration of Si-based transistors with non-Si technologies by semiconductor regrowth over an insulator material
Publication Date: 2024.11.19 INTEL CORP
  • US12148757B2 patent drawing
  • US12148757B2 patent drawing
  • US12148757B2 patent drawing

AI summary

Disclosed herein are IC structures, packages, and devices that include Si-based semiconductor material stack monolithically integrated on the same support structure as non-Si transistors or other non-Si-based devices. In some aspects, the Si-based semiconductor material stack may be provided by semiconductor regrowth over an insulator material. Providing a Si-based semiconductor material stack monolithically integrated on the same support structure as non-Si based devices may provide a viable approach to integrating Si-based transistors with non-Si technologies because the Si-based semiconductor material stack may serve as a foundation for forming Si-based transistors.