SiC Schottky Diode Doped Region Segmentation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Silicon carbide Schottky barrier diodes face challenges in reducing specific differential resistance while maintaining low reverse leakage current and good forward surge current withstand capability, as the p+ region's spacing and area trade-off affects both parameters.
Innovation Solution
The silicon carbide semiconductor device incorporates a drift layer with regularly arranged first and second doped regions, where the second doped regions have a greater width and area than the first, and are spaced closer, forming a Schottky contact with a metal layer to reduce specific differential resistance and enhance surge current handling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If the spacing between p-type doped regions is reduced to lower reverse leakage current, then reverse leakage current decreases, but specific differential resistance increases due to increased JFET channel resistance
Solution Approach 1:
The patent applies local quality by creating two distinct types of doped regions with different characteristics: first doped regions with smaller area and larger spacing optimized for low reverse leakage, and second doped regions with larger area and smaller spacing optimized for low specific differential resistance. Each region type is strategically placed to address different performance requirements at different locations within the active region.
Solution Approach 2:
The patent segments the doped region structure into two separate types (first and second doped regions) rather than using a uniform structure. This segmentation allows independent optimization of each region type's parameters - the first regions focus on leakage current control while the second regions focus on resistance reduction, resolving the contradiction between these two opposing requirements.
2Manufacturing precision
If the p+ region occupies larger area to reduce specific differential resistance, then forward current density increases, but capability to withstand forward surge current decreases
Solution Approach 1:
The patent uses local quality by designing second doped regions with larger area specifically in locations where low specific differential resistance is critical for reducing switching losses, while first doped regions with appropriate spacing are positioned to maintain surge current handling capability. This localized differentiation allows simultaneous optimization of both parameters.
Solution Approach 2:
By segmenting the doped regions into two types with different area characteristics, the patent enables the larger-area second regions to reduce specific differential resistance while the smaller-area first regions preserve the device's ability to withstand surge currents, thus resolving the contradiction between these two performance aspects.
3Manufacturing precision
If the spacing between p-type regions is increased to reduce JFET channel resistance, then specific differential resistance decreases, but reverse leakage current increases due to poorer electric field pinch-off
Solution Approach 1:
The patent implements local quality by assigning different spacing characteristics to different region types: second doped regions with smaller spacing are placed where low specific differential resistance is prioritized, while first doped regions with larger spacing are positioned where low reverse leakage current is the primary concern. This spatial differentiation resolves the contradiction between these competing requirements.
Solution Approach 2:
The segmentation of doped regions into two types with different spacing parameters allows the system to simultaneously achieve low specific differential resistance (through second regions with smaller spacing) and low reverse leakage current (through first regions with larger spacing), effectively resolving the technical contradiction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces specific differential resistance, allowing higher forward current density and smaller chip size, while maintaining low reverse leakage current and improved surge current capability, optimizing both performance and cost.
Implementation Method 1
A Schottky barrier diodes (SBDs) that takes advantage of the metal-semiconductor junction created between a metal layer and a doped semiconductor layer provide two unique advantages over traditional PiN diodes. First, the Schottky barrier of the SBDs has a built-in potential lower than that of a PiN diode, which correlates to lower forward voltage drops.
Implementation Method 2
where Schottky barrier contact are formed on the surface of the n-type drift layer between heavily doped p-type (p+) regions, the depletion of p-n junctions formed by those p+ regions and n-type drift layer is faster than Schottky contact and thus provide good shielding if the spacing between those p+ regions are appropriately designed according to the doping concentration of n-type drift layer and targeted voltage ratings.
Implementation Method 3
Under such conditions, the p-n junctions in the JBS/MPS diodes would turn on and start to inject minority carriers (holes) which modulate the conductivity of drift layer, lower the resistance and reduce generated heat to avoid the thermal run-away failure of the device.
Data Source
AI summary
A silicon carbide semiconductor device includes a drift layer having a first conductivity type and a surface in which an active region is defined; a plurality of first doped regions having a second conductivity and arranged within the active region; a plurality of second doped regions having a second conductivity and arranged within the active region; and a metal layer disposed on the surface of the drift layer and forming a Schottky contact with the drift layer. Each of the first doped regions has a first minimum width and a first area and are spaced from each other by a first minimum spacing Each of the second doped regions has a second minimum width greater than the first minimum width and a second area greater than the first area and are spaced from the first doped region by a second minimum spacing less than the first minimum spacing.