SiC DMOSFET Source Structure for Third-Quadrant Cross-Over Current
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Solution Overview
Problem
Silicon carbide (SiC) power MOSFETs face reliability issues due to challenges in inversion-layer mobility and passivating dielectric layers, leading to performance and reliability problems, particularly in third quadrant cross-over current.
Innovation Solution
A vertical Silicon Carbide (SiC) double-implantation metal oxide semiconductor field-effect transistor (DMOSFET) design is implemented, featuring a first conductivity type second source region with a thickness and doping concentration optimized between the silicide layer and the second conductivity type well region, and a metal region with a target work function, to enhance turn-on voltage and reduce minority carrier injection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional SiC power MOSFET structures are used, then high blocking voltage is achieved, but reliability deteriorates due to inversion-layer mobility challenges and passivating dielectric layer issues
Solution Approach 1:
The source region is divided into two distinct parts: a first source region extending from the surface to a first depth, and a second source region extending from the surface to a second depth greater than the first depth. This segmentation allows each source region to serve different functions - the first source region provides standard carrier injection while the second source region controls minority carrier injection and turn-on voltage, thereby improving reliability without excessive complexity
Solution Approach 2:
Different doping concentrations are applied to different source regions. The first source region has a first doping concentration optimized for standard operation, while the second source region has a second doping concentration specifically optimized to control turn-on voltage and minimize minority carrier injection. This local quality differentiation resolves the contradiction by targeting specific functional requirements in specific locations
2Reliability
If standard source region design is used, then manufacturing simplicity is maintained, but third quadrant cross-over current performance deteriorates
Solution Approach 1:
The source region is segmented into two depth levels with different doping concentrations, which improves third quadrant cross-over current performance by controlling minority carrier injection. The manufacturing process achieves this segmentation through sequential implantation steps with different energies and concentrations, maintaining reasonable manufacturing simplicity while achieving the desired performance improvement
Solution Approach 2:
The invention changes key parameters of the source region - specifically the doping concentration and depth - to optimize third quadrant performance. By adjusting the second doping concentration and second depth, the turn-on voltage is controlled and minority carrier injection is minimized, improving cross-over current without fundamentally changing the manufacturing approach
3Reliability
If higher doping concentration is used in source region, then conductivity is improved, but minority carrier injection increases leading to reliability issues
Solution Approach 1:
The second source region uses a different doping concentration than the first source region, creating local quality differentiation. This allows the second source region to have optimized doping specifically for controlling turn-on voltage and minimizing minority carrier injection, while the first source region maintains doping optimized for conductivity. This resolves the contradiction by applying different doping strategies in different locations
Solution Approach 2:
By segmenting the source region into two depth levels with different doping concentrations, the invention separates the functions of conductivity provision (first source region) and turn-on voltage control/minority carrier injection suppression (second source region), thereby resolving the contradiction between conductivity and minority carrier injection
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design increases third quadrant cross-over current and improves device reliability by optimizing the source region thickness, doping concentration, and metal work function, thereby addressing performance and reliability issues in SiC power MOSFETs.
Implementation Method 1
forming a first conductivity type second source region, through a third patterned hard mask layer between a silicide layer on a topside of the SiC substrate and the second conductivity type well region
Data Source
AI summary
An embodiment relates to a n-type planar gate DMOSFET comprising a Silicon Carbide (SiC) substrate. The SiC substrate includes a N+ substrate, a N− drift layer, a P-well region and a first N+ source region within each P-well region. A second N+ source region is formed between the P-well region and a source metal via a silicide layer. During third quadrant operation of the DMOSFET, the second N+ source region starts depleting when a source terminal is positively biased with respect to a drain terminal. The second N+ source region impacts turn-on voltage of body diode regions of the DMOSFET by establishing short-circuitry between the P-well region and the source metal when the second N+ source region is completely depleted.