III-Nitride Channel and SiC Drift Region Hybrid FET
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Solution Overview
Problem
Conventional semiconductor devices, such as silicon carbide MOSFETs and GaN HEMTs, face challenges with low MOS-channel mobility, high channel resistance, large gate-to-drain capacitance, and reliability issues like current collapse and gate leakage, which affect switching speed and efficiency.
Innovation Solution
A semiconductor device with a III-nitride channel region and a silicon carbide drift region is developed, incorporating a GaN structure as a gate-controlled channel and a SiC structure as a drift region to enhance off-state voltage sustainability, featuring a hybrid FET configuration with AlGaN/GaN heterostructures and p-wells for improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a silicon carbide MOSFET is used as a power semiconductor switching device, then normally-off operation can be obtained, but MOS-channel mobility remains low leading to high channel resistance
Solution Approach 1:
The patent employs a hybrid structure combining III-nitride semiconductor material for the channel region with silicon carbide for the drift region. The III-nitride channel provides high electron mobility to reduce channel resistance, while the SiC drift region maintains normally-off operation capability and high voltage blocking capability. This composite material approach resolves the contradiction by allowing each material to contribute its superior properties.
2Strength
If a junction gate field-effect transistor is used as a power semiconductor switching device, then high voltage handling is possible, but normally-off operation is difficult to achieve and gate-to-drain capacitance is large adversely impacting switching speed
Solution Approach 1:
The hybrid III-nitride/SiC structure enables the device to achieve both high voltage blocking capability through the SiC drift region and fast switching speed through the III-nitride channel with low gate-to-drain capacitance. The III-nitride material inherently provides lower capacitance compared to conventional structures, resolving the speed limitation.
3Manufacturing precision
If a GaN HEMT is used as a power semiconductor switching device, then a high-mobility channel is achieved, but high E-field induces reliability issues such as current collapse and gate leakage
Solution Approach 1:
The patent segments the device into distinct functional regions: the III-nitride channel region handles high-frequency signal control with high mobility, while the SiC drift region handles high-voltage blocking. This segmentation allows the GaN HEMT to operate at lower electric fields in the channel region, reducing reliability issues like current collapse and gate leakage while maintaining high mobility benefits.
Solution Approach 2:
By combining III-nitride and silicon carbide materials, the patent creates a hybrid structure where the SiC drift region provides high voltage blocking capability, reducing the electric field stress on the III-nitride channel and gate dielectric. This composite approach maintains high channel mobility while improving overall device reliability under high-voltage operation.
4Strength
If lateral devices are used to scale up breakdown voltage, then voltage blocking capability increases, but a larger device area is required
Solution Approach 1:
The patent transitions from a purely lateral device structure to a hybrid structure that utilizes vertical stacking of III-nitride and SiC layers. This dimensional change allows the device to achieve high breakdown voltage through the vertical SiC drift region thickness rather than requiring large lateral dimensions, thereby reducing the overall device area while maintaining high voltage blocking capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves lower on-state resistance, higher voltage blocking capabilities, faster switching speed, and improved reliability by minimizing current collapse and gate leakage, while being fabricated on a smaller chip area compared to conventional devices.
Implementation Method 1
AlGaN/GaN heterostructures
Implementation Method 2
high electron mobility transistor (HEMT)
Implementation Method 3
higher voltage blocking capabilities
Data Source
AI summary
Techniques are provided for forming a semiconductor device. In an aspect, a semiconductor device is provided that includes a silicon carbide (SiC) structure and a III-nitride structure. The SiC structure includes a drain electrode, a substrate layer that is formed on the drain electrode and includes SiC, and a drift layer formed on the substrate layer. The drift layer includes p-well regions that allow current to flow through a region between the p-well regions. The III-nitride structure includes a set of III-nitride semiconductor layers formed on the SiC structure, a passivation layer formed on the set of III-nitride semiconductor layers, a source electrode electrically coupled to the p-well regions, and gate electrodes electrically isolated from the set of III-nitride semiconductor layers. In an aspect, the SiC structure includes a transition layer that includes connecting regions. In another aspect, the III-nitride structures includes connection electrodes electrically coupled to the connecting regions.