Silicon Carbide Epitaxy on Silicon Wafer
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Solution Overview
Problem
The challenge of growing silicon carbide on silicon substrates is exacerbated by lattice mismatch and differing thermal expansion coefficients, leading to wafer bow and mechanical deficiencies, particularly when extending over large distances, which complicates the fabrication of silicon carbide-on-silicon semiconductor devices with vertical-type transistors.
Innovation Solution
A method involving a monocrystalline silicon wafer with masking layers and windows to form silicon carbide seed regions, allowing for the growth of monocrystalline silicon carbide layers while incorporating polycrystalline or amorphous silicon carbide regions to reduce stress and bow-causing forces, using a process that includes etching and carbon conversion at elevated temperatures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If silicon carbide is grown on silicon wafer over extended distances, then device fabrication capability is improved, but wafer bow and mechanical deficiencies worsen due to thermal expansion differences
Solution Approach 1:
The patent divides the continuous silicon carbide layer into multiple segments separated by trenches. This segmentation reduces the cumulative thermal stress across the wafer surface, preventing wafer bow while maintaining device fabrication capability in each segmented region. The trenches act as stress relief zones that break the continuous stress path.
Solution Approach 2:
The patent applies different structural characteristics to different regions of the wafer. The device regions contain monocrystalline silicon carbide for optimal electrical performance, while the trench regions provide stress relief. This local differentiation allows each region to serve its specific function while contributing to overall wafer stability.
2Ease of manufacture
If silicon carbide is grown on silicon wafer, then cost-effective substrate utilization is improved, but lattice mismatch and thermal expansion differences cause mechanical stress
Solution Approach 1:
By segmenting the silicon carbide layer into discrete regions separated by trenches, the patent reduces the total stress accumulation while maintaining effective use of the silicon substrate. The segmentation allows stress to be localized and managed rather than accumulated across the entire wafer surface.
Solution Approach 2:
The trenches act as intermediary elements between adjacent silicon carbide regions. These trenches provide a buffer zone that accommodates thermal expansion differences and reduces the direct stress transmission between adjacent device regions, thereby reducing overall mechanical stress.
3Manufacturing precision
If silicon dioxide masking layer is used, then selective growth control is improved, but the layer is etched away at high temperatures used for silicon carbide growth
Solution Approach 1:
The patent changes the material parameter of the masking layer from silicon dioxide to silicon nitride. This material substitution maintains the desired selective growth control functionality while providing resistance to etching by the carbon-containing gases used in silicon carbide deposition at high temperatures.
Solution Approach 2:
The patent utilizes the phase transition property of silicon nitride, which forms a protective yellow layer when exposed to carbon-containing gases at deposition temperatures. This phase transition creates a protective barrier that prevents further etching of the masking layer while allowing selective silicon carbide growth through the windows.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces wafer bow and stress by confining thermal expansion forces to smaller areas and utilizing polycrystalline silicon carbide to relax strain, resulting in a more stable and defect-reduced silicon carbide layer suitable for semiconductor device fabrication.
Implementation Method 1
differences in thermal expansion for silicon and silicon carbide
Implementation Method 2
regions of polycrystalline and/or amorphous silicon carbide may be formed between the monocrystalline silicon carbide layers which can help to reduce stress and, thus, contribute to reducing bow-causing forces
Implementation Method 3
etching the masking layer through the windows in the etch mask to reach the principal surface of the wafer
Implementation Method 4
growing monocrystalline silicon carbide on the silicon carbide seed regions
Data Source
AI summary
A method comprises providing a monocrystalline silicon wafer (11) having a principal surface (17) which supports a masking layer (24), for example silicon dioxide or polycrystalline silicon, having windows (25) to expose corresponding regions of the silicon wafer, forming silicon carbide seed regions (30) on the exposed regions of the wafer, for example by forming carbon and converting the carbon into silicon carbide, and growing monocrystalline silicon carbide (31) on the silicon carbide seed regions. Thus, monocrystalline silicon carbide can be formed selectively on the silicon wafer which can help to avoid wafer bow.