SiC Gate Oxide Steplike Portions for Edge Field Relaxation

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Solution Overview

Problem

The existing silicon carbide semiconductor devices face dielectric breakdown and reduced insulation withstand-voltage due to electric field concentration at the edge of the gate oxide film adjacent to the outer peripheral insulating film, leading to reliability issues.

Innovation Solution

The solution involves forming steplike portions thicker than the gate oxide film at the edge of the gate oxide film adjacent to the outer peripheral insulating film, achieved through speed-increasing oxidation of an amorphous layer, which relaxes the electric field concentration and prevents dielectric breakdown.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If a thick outer peripheral insulating film is formed on the N- semiconductor layer in the outer peripheral area, then the gate oxide film thickness at the boundary becomes thinner (about half the gate oxide film thickness), but this causes electric field concentration and dielectric breakdown at the edge portion of the gate oxide film

Engineering Contradiction:
Improveouter peripheral insulating film thicknessVSAvoidgate oxide film insulation withstand-voltage
Core Design Contradiction:
Length of stationary objectVSReliability

Solution Approach 1:

The invention applies different oxidation treatments to different regions: the amorphous layer at the boundary between the cell forming area and outer peripheral area undergoes speed-increasing oxidation to form a thicker gate oxide film (steplike portion), while the gate oxide film in the cell forming area is formed by conventional thermal oxidation. This local differentiation prevents electric field concentration at the boundary while maintaining proper gate oxide thickness in the active area.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

An amorphous layer is formed in advance at the boundary region before the gate oxide film formation step. This preliminary action enables the subsequent speed-increasing oxidation to create a thicker gate oxide film at the critical boundary area, preventing dielectric breakdown before the device operates.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If the gate oxide film is formed by thermal oxidation method, then the gate oxide film thickness is uniform, but the electric field concentrates at the edge portion adjacent to the outer peripheral insulating film causing dielectric breakdown

Engineering Contradiction:
Improvegate oxide film thickness uniformityVSAvoidinsulation withstand-voltage at gate oxide film edge
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The invention creates a steplike portion with different thickness at the boundary region compared to the cell forming area. The amorphous layer at the boundary undergoes speed-increasing oxidation to form a thicker gate oxide film segment, while the cell forming area receives conventional thermal oxidation. This local quality differentiation eliminates electric field concentration at the boundary while maintaining manufacturing precision through controlled oxidation processes.

Inventive Principle:
Principle #3Local quality

3Device complexity

If the gate electrode layer extends from above the gate oxide film to above the outer peripheral insulating film, then the device structure is simplified, but the electric field concentrates at the rise portion of the gate electrode layer causing dielectric breakdown

Engineering Contradiction:
Improvegate electrode layer structureVSAvoidbreakdown lifetime of gate oxide film
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The invention maintains the simplified gate electrode layer structure that extends continuously from above the gate oxide film to above the outer peripheral insulating film. However, it locally thickens the gate oxide film at the boundary region by forming a steplike portion through speed-increasing oxidation of the amorphous layer. This local modification prevents electric field concentration at the gate electrode rise portion while preserving the simplified overall structure.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the insulation withstand-voltage and breakdown lifetime of the gate oxide film, thereby improving the reliability of the silicon carbide semiconductor device by preventing dielectric breakdown and maintaining the integrity of the gate oxide film.

Implementation Method 1

an amorphous layer of silicon carbide is formed at the bottom of each trench provided between source layers, the amorphous layer is subjected to speed-increasing oxidation upon thermal oxidation for forming a gate oxide film

Methodology Applied
Scientific EffectSpeed-increasing oxidation: Oxidation

Implementation Method 2

a gate oxide film comprised of silicon oxide, which is formed on the front surface of the N− semiconductor layer in the cell forming area by a thermal oxidation method

Methodology Applied
Scientific EffectThermal oxidation: Oxidation

Data Source

PatentUS7679132B2Silicon carbide semiconductor device and manufacturing method thereof
Publication Date: 2010.03.16 LAPIS SEMICON CO LTD
  • US7679132B2 patent drawing
  • US7679132B2 patent drawing
  • US7679132B2 patent drawing

AI summary

A silicon carbide semiconductor device includes a semiconductor substrate containing silicon carbide, a semiconductor layer formed over the semiconductor substrate, and a plurality of well regions formed on a front surface side of a cell forming area set to the semiconductor layer. The device further includes source layers formed on the front surface side lying within the well regions, an outer peripheral insulating film thick in thickness, which is formed over the semiconductor layer in an outer peripheral area surrounding the cell forming area, a gate oxide film formed over the front surface of the semiconductor layer in the cell forming area, and a gate electrode layer formed so as to extend from above the gate oxide film to above the outer peripheral insulating film.