SiC Power Device Graphene Current Path Resistance
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Solution Overview
Problem
The specific on-state resistance (Ron×A) of silicon carbide (SiC) vertical power semiconductor devices needs to be improved for better performance in high-temperature/high-voltage semiconductor electronics.
Innovation Solution
Incorporating at least one graphene layer into the current path or channel region of the SiC semiconductor body, either between contacts, within trenches, or on the surface of a porous substrate, to reduce resistance by leveraging the high mobility and concentration of free charge carriers in graphene.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional SiC semiconductor structures are used, then device simplicity and ease of manufacture are maintained, but the specific on-state resistance (Ron×A) is too high for optimal performance
Solution Approach 1:
The patent integrates graphene layers with SiC semiconductor structures to create a composite material system. The graphene layers are positioned in specific regions (channel regions, current paths, or trench fillings) to provide superior electrical conductivity and reduce specific on-state resistance while maintaining the structural framework of conventional SiC devices
Solution Approach 2:
The invention applies graphene layers selectively in specific regions rather than uniformly throughout the device. Graphene is placed in channel regions, current paths between contacts, or trench fillings where high electrical conductivity is most needed, allowing local optimization of electrical properties without unnecessarily complicating the entire device structure
2Reliability
If graphene layers are integrated into the SiC semiconductor body, then the resistance of the current path is reduced, but the manufacturing process becomes more complex
Solution Approach 1:
The graphene layers are integrated into the SiC semiconductor body during the manufacturing process at appropriate stages, such as forming graphene in channel regions before final device assembly or filling trenches with graphene-containing materials. This preliminary integration approach reduces the need for post-manufacturing modifications and simplifies the overall manufacturing workflow despite the added complexity of graphene processing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The integration of graphene layers decreases the resistance of the current path, thereby enhancing the specific on-state resistance of SiC vertical power semiconductor devices, improving their performance and efficiency.
Implementation Method 1
A current path between the first contact and the second contact includes at least one graphene layer
Implementation Method 2
to reduce resistance by leveraging the high mobility and concentration of free charge carriers in graphene
Data Source
AI summary
A semiconductor power device includes a SiC semiconductor body. At least part of the SiC semiconductor body constitutes a drift zone. A first contact is at a first side of the SiC semiconductor body. A second contact is at a second side of the SiC semiconductor body. The first side is opposite the second side. A current path between the first contact and the second contact includes at least one graphene layer.