SiC IGBT Trench Gate On-Resistance Reduction
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Solution Overview
Problem
Silicon carbide (SiC) based Insulated Gate Bipolar Transistors (IGBTs) face high on-resistance due to high built-in potential, which increases threshold voltage and on-resistance, limiting their performance.
Innovation Solution
The semiconductor device incorporates a trench structure with a gate insulating film and gate electrode, along with strategically placed impurity regions and a metal film, to reduce on-resistance by forming Schottky barrier diodes and optimizing the impurity concentration and interval of collector regions, allowing for lower threshold voltage and improved current flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If SiC material is used for IGBT to increase dielectric breakdown voltage, then the dielectric breakdown voltage is improved, but the built-in potential increases causing higher on-resistance
Solution Approach 1:
The patent applies local quality by creating regions with different impurity concentrations within the drift layer. Specifically, a first impurity region with higher concentration and a second impurity region with lower concentration are formed at different depths, allowing local optimization of electrical properties to reduce on-resistance while maintaining the high breakdown voltage advantage of SiC material
Solution Approach 2:
The patent changes the impurity concentration parameter within the drift layer by forming multiple impurity regions with different doping levels. The first impurity region has a higher concentration (1×10^16 to 1×10^18 atoms/cm³) while the second impurity region has a lower concentration (1×10^14 to 1×10^16 atoms/cm³), thereby modifying the built-in potential and reducing on-resistance
2Object-affected harmful factors
If high impurity concentration is used in drift layer to reduce on-resistance, then on-resistance is improved, but dielectric breakdown voltage decreases
Solution Approach 1:
The patent segments the drift layer into multiple impurity regions with different concentration levels. The first impurity region (deeper, higher concentration) provides conductivity for current flow, while the second impurity region (shallower, lower concentration) maintains the electric field distribution for high breakdown voltage, thus segmenting the conflicting requirements spatially
Solution Approach 2:
The patent introduces a depth dimension for impurity concentration variation, creating a three-dimensional impurity distribution rather than a uniform two-dimensional doping. This vertical stratification of impurity regions allows simultaneous optimization of both on-resistance and breakdown voltage
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the on-resistance and threshold voltage of SiC IGBTs, enabling efficient current flow at lower voltages and maintaining performance at higher voltages, thus enhancing the device's operational efficiency.
Implementation Method 1
a gate insulating film formed in the trench, a gate electrode embedded in the trench with the gate insulating film interposed therebetween
Implementation Method 2
a pn-junction is formed between the n-type drift layer and the p-type emitter region. The pn-junction causes a potential difference, that is, a built-in potential, in a current path of the IGBT
Implementation Method 3
a p-type emitter region selectively formed by ion implantation in the n-type drift layer
Data Source
AI summary
To improve an on-resistance of a semiconductor device. A plurality of collector regions are formed at a predetermined interval on a bottom surface of a drift layer made of SiC. Next, on the bottom surface of the drift layer, both of the drift layer and a collector region via a silicide layer are connected to a collector electrode.