SiC MOS Interface Trap Layer for Leakage and Switching Stability
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Solution Overview
Problem
The presence of fixed positive charge at the oxide interface in MOSFET devices with silicon carbide substrates leads to instability and high junction leakage currents due to defects and interface states, affecting switching performance and electrical field profiles.
Innovation Solution
Incorporating an insulating layer with a high density of electron traps, such as Al2O3 or SiO2, which is designed to present a negative charge that compensates for positive charges from the SiC semiconductor, thereby stabilizing the device and optimizing its performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an oxide layer (SiO2) is grown or deposited on 3C-SiC substrate, then the MOS structure is formed for device fabrication, but fixed positive charges accumulate at the oxide/SiC interface causing device instability and high leakage currents
Solution Approach 1:
A nitride layer (Si3N4 or AlN) is introduced as an intermediary layer between the oxide layer and the 3C-SiC substrate. This nitride layer acts as a mediator that prevents direct interaction between the oxide and SiC, thereby eliminating the formation of interface states and fixed positive charges at the oxide/SiC interface while still allowing the MOS structure to function.
Solution Approach 2:
The harmful interface states and fixed positive charges are effectively removed by inserting the nitride layer. The nitride layer extracts the problematic interface between oxide and SiC, creating a new interface (oxide/nitride and nitride/SiC) that does not generate the same harmful electrical characteristics.
2Device complexity
If oxide layer is deposited on 3C-SiC, then gate insulation is achieved, but interface defects create states that modulate surface potential and affect switching performance
Solution Approach 1:
The nitride layer serves as an intermediary that creates a high-quality interface with the 3C-SiC substrate, reducing interface defects and trapped charges. This improves the modulation characteristics of the surface potential and enhances switching performance while maintaining the gate insulation function.
3Device complexity
If conventional oxide/SiC interface is used, then simple structure is maintained, but positive charges shift operating characteristics and create inversion layers causing high leakage currents
Solution Approach 1:
The nitride layer is inserted as an intermediary between oxide and SiC to eliminate the formation of inversion layers at the interface. By preventing direct oxide-SiC contact, the nitride layer eliminates the mechanism that creates fixed positive charges and inversion layers, thereby reducing junction leakage currents.
Solution Approach 2:
The nitride layer, which adds structural complexity, converts the harmful effect of interface states into a beneficial low-interface-state interface. The additional layer transforms what would be a harmful oxide-SiC interface into a beneficial oxide-nitride-SiC structure with superior electrical characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively balances positive interface charges, reducing junction leakage and enhancing switching performance and structural stability of SiC-based MOSFET and Schottky diode devices.
Implementation Method 1
Incorporating an insulating layer with a high density of electron traps, such as Al2O3 or SiO2, which is designed to present a negative charge that compensates for positive charges from the SiC semiconductor
Data Source
AI summary
An electronic device comprising: a semiconductor body of silicon carbide, SiC, having a first and a second face, opposite to one another along a first direction, which presents positive-charge carriers at said first face that form a positive interface charge; a first conduction terminal, which extends at the first face of the semiconductor body; a second conduction terminal, which extends on the second face of the semiconductor body; a channel region in the semiconductor body, configured to house, in use, a flow of electrons between the first conduction terminal and the second conduction terminal; and a trapping layer, of insulating material, which extends in electrical contact with the semiconductor body at said channel region and is designed so as to present electron-trapping states that generate a negative charge such as to balance, at least in part, said positive interface charge.
