SiC MISFET Gate Control Circuit for Parasitic Oscillation Suppression
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Solution Overview
Problem
In half bridge circuits, particularly in three-phase inverter circuits and synchronous-rectification DC/DC converters, there is a phenomenon of gate erroneous turning-on (misfiring) due to drain voltage changes, leading to parasitic oscillations and potential device breakdown, especially when using Silicon Carbide (SiC) devices, which limits high-speed operation and increases noise.
Innovation Solution
A power circuit design that includes a main substrate with specific electrode patterns and Metal-Insulator-Semiconductor Field Effect Transistors (MISFETs) connected through gated diodes to control current paths and reduce parasitic oscillations, allowing for high-speed switching performance by separating signal and power wiring and using SiC MISFETs to minimize misoperation and oscillations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If SiC power devices are used to achieve high switching speed and low on resistance, then switching performance is improved, but gate erroneous turning-on and parasitic oscillations occur due to drain voltage changes
Solution Approach 1:
A control circuit is introduced as an intermediary component between the gate and source of the MISFET. This control circuit actively monitors and manages the current path between gate and source, preventing erroneous turning-on caused by drain voltage changes while maintaining the high switching speed benefits of SiC devices.
Solution Approach 2:
The control circuit performs preliminary anti-action by proactively preventing gate erroneous turning-on before it can occur. By continuously controlling the gate-source current path, the system counteracts the harmful effects of drain voltage changes that would otherwise cause misfiring and parasitic oscillations.
2Device complexity
If discrete devices are used with shared source wiring, then device complexity is reduced, but gate signal degradation occurs due to electrification of source wiring
Solution Approach 1:
The patent segments the source wiring into two distinct paths: one for power connections and another for gate signal connections. This segmentation prevents the gate signal from being degraded by electrification effects in the power path, while maintaining a relatively simple overall circuit structure through the use of standard PCB routing practices.
3Reliability
If source sense wiring is used to separate signal and power wiring, then gate signal integrity is improved, but wiring complexity and module size increase
Solution Approach 1:
The control circuit is integrated directly into the power module package, merging the gate protection functionality with the power switching devices. This integration eliminates the need for separate external protection circuits and reduces overall wiring complexity, while still providing the benefits of separated signal and power paths through the module's internal layout.
4Speed
If gate and source wiring are kept short in power modules, then switching speed is improved, but gate erroneous turning-on occurs due to resonant oscillation from stored energy
Solution Approach 1:
The control circuit acts as an intermediary that actively manages the gate-source current path during switching transitions. By doing so, it prevents the resonant oscillation that would otherwise occur from stored energy in the short gate and source wiring, while maintaining the advantages of short wiring for high-speed operation.
Solution Approach 2:
The control circuit implements feedback control by continuously monitoring the gate-source voltage and current conditions. This feedback mechanism allows the circuit to detect and counteract the onset of parasitic oscillations, preventing erroneous turning-on while maintaining optimal switching speed performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed power circuit effectively reduces misoperation and parasitic oscillations, enabling high-speed switching performance while preventing device breakdown and noise, thus enhancing the reliability and efficiency of SiC-based power modules.
Implementation Method 1
a first control circuit connected between a first gate and a first source of the first MISFET, the first control circuit configured to control a current path conducted from the first source towards the first gate
Implementation Method 2
a first MISFET in which a first drain is disposed on the first electrode pattern; a second MISFET in which a second drain is disposed on the third electrode pattern
Data Source
AI summary
The power circuit includes: a main substrate; a first electrode pattern disposed on the main substrate and connected to a positive-side power terminal P; a second electrode pattern disposed on a main substrate and connected to a negative-side power terminal N; a third electrode pattern disposed on the main substrate and connected to an output terminal O; a first MISFET Q1 of which a first drain is disposed on the first electrode pattern; a second MISFET Q4 of which a second drain is disposed on the third electrode pattern; a first control circuit (DG1) connected between a first gate G1 and a first source S1 of the first MISFET, and configured to control a current path conducted from the first source towards the first gate.