SiC MISFET Interface Engineering for High Mobility
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Solution Overview
Problem
Carrier mobility in the interface between a semiconductor and an insulating layer in silicon carbide (SiC) based metal-insulator-semiconductor (MIS) structures is lower than in silicon (Si) based structures, leading to high on-resistance in devices like MISFETs and IGBTs.
Innovation Solution
A semiconductor device with a SiC layer surface inclined at specific angles, featuring an interface region with a six-membered ring structure and carbon-carbon bonds between the SiC layer and the gate insulating layer, enhancing carrier mobility and reducing on-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional SiC-based MIS structure is used, then the device can operate at high temperature with good thermal conductivity, but carrier mobility at the semiconductor-insulator interface is low leading to high on-resistance
Solution Approach 1:
The patent changes the crystallographic orientation parameter of the SiC substrate from conventional orientations to specifically the (000-1) face (carbon face), which fundamentally alters the interface properties and enables high carrier mobility while maintaining SiC's inherent high temperature operation capabilities
Solution Approach 2:
The patent creates a composite interface structure combining the SiC (000-1) face with a specific insulating layer configuration, forming a unique metal-insulator-semiconductor structure that leverages both the excellent thermal properties of SiC and the improved carrier mobility at the specific crystal orientation interface
2Manufacturing precision
If the SiC layer surface is inclined at a specific angle, then the interface region is stabilized and carrier mobility is improved, but the manufacturing process becomes more complex
Solution Approach 1:
The patent specifies a precise inclination angle parameter (0° to 10° relative to the (000-1) face) which, while requiring controlled manufacturing, provides a clear quantitative target that simplifies process optimization and quality control compared to qualitative specifications
Data Source
AI summary
A semiconductor device of an embodiment includes a SiC layer having a surface inclined with respect to a {000-1} face at an angle of 0° to 10° or a surface a normal line direction of which is inclined with respect to a <000-1> direction at an angle of 80° to 90°, a gate electrode, an insulating layer at least a part of which is provided between the surface and the gate electrode, and a region, at least apart of which is provided between the surface and the insulating layer, including a bond between carbon and carbon.