SiC MISFET Self-Aligned Channel and Gate Structure

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Solution Overview

Problem

In SiC-based MISFET manufacturing, the high-temperature activation annealing required makes it difficult to frequently use self-alignment processes, necessitating high-accuracy alignment techniques for controlling device characteristics.

Innovation Solution

A semiconductor device and manufacturing method where a channel region, source region, and gate structure are formed in mutually self-aligned relations using a silicon-carbide-based semiconductor substrate, employing silicon-based insulating films for sidewall self-alignment and carbon films for gate structure alignment, allowing for precise control of device characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high-temperature activation annealing is performed in SiC-based MISFET manufacturing, then impurity activation is achieved, but self-alignment process cannot be frequently used

Engineering Contradiction:
Improveimpurity activationVSAvoidself-alignment process frequency
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent divides the manufacturing process into distinct stages: first forming the channel region with its mask, then forming sidewall insulating films on the channel region, and finally using these sidewalls as masks for source region formation. This segmentation allows each step to be optimized independently, enabling self-alignment to be used frequently without compromising the high-temperature annealing requirement for impurity activation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary formation of the channel region and sidewall insulating films before the high-temperature activation annealing step. The sidewall insulating films are formed in advance to serve as masks during subsequent source region implantation, allowing the self-alignment process to be established before the annealing step that would otherwise prevent self-alignment usage.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If self-alignment technique is used frequently, then manufacturing efficiency is improved, but high-accuracy alignment is required to control device characteristics

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidalignment accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent implements self-alignment where the channel region structure itself serves as the reference for positioning the source regions, and the source regions serve as the reference for positioning the gate structure. The sidewall insulating films automatically form on the channel regions, providing built-in alignment references without requiring external alignment operations. This self-service mechanism enables frequent self-alignment usage while maintaining high accuracy through the inherent geometric relationships of the structures.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables frequent use of self-alignment techniques in SiC-based MISFET manufacturing, facilitating precise control of device characteristics and improving manufacturing efficiency.

Implementation Method 1

employing silicon-based insulating films for sidewall self-alignment

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Implementation Method 2

carbon films for gate structure alignment

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Data Source

PatentUS8569132B2Semiconductor device and manufacturing method thereof
Publication Date: 2013.10.29 RENESAS ELECTRONICS CORP
  • US8569132B2 patent drawing
  • US8569132B2 patent drawing
  • US8569132B2 patent drawing

AI summary

In a SiC-based MISFET and a manufacturing process thereof, after the introduction of an impurity, extremely-high-temperature activation annealing is required. Accordingly, it is difficult to frequently use a self-alignment process as performed in a silicon-based MISFET manufacturing process. This results in the problem that, to control the characteristics of a device, a high-accuracy alignment technique is indispensable. In accordance with the present invention, in a semiconductor device such as a SiC-based vertical power MISFET using a silicon-carbide-based semiconductor substrate and a manufacturing method thereof, a channel region, a source region, and a gate structure are formed in mutually self-aligned relation.