SiC Power MOSFET Layout for Uniform Channel Length

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Solution Overview

Problem

Silicon carbide power MOSFETs face challenges in achieving uniform channel length due to misalignment during manufacturing, leading to asymmetrical channel lengths and variations in current density, which affects the device's ruggedness and performance.

Innovation Solution

The solution involves forming a silicon carbide power semiconductor device with a shared mask for the source and low-resistance regions, and a JFET region, where the low-resistance region forms an overlap with adjacent body regions to ensure uniform channel length, reducing the number of masks required and manufacturing complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If separate masks are used for forming body region and source region in silicon carbide power MOSFET, then implantation regions can be formed before gate structure, but channel length becomes non-uniform due to misalignment

Engineering Contradiction:
Improveprocess flexibilityVSAvoidchannel length uniformity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent merges the mask patterns for the body region and source region into a single unified mask. The mask includes a body region pattern and a source region pattern that are formed simultaneously, eliminating misalignment issues between separate mask applications and ensuring uniform channel length across all transistor cells.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent performs preliminary alignment design in the mask pattern itself, where the relative positions of the body region pattern and source region pattern are pre-determined to achieve the desired channel length. This preliminary action in mask design ensures uniform channel length without requiring high-precision alignment during the actual fabrication process.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If multiple masks are used for forming body region, source region, and JFET region, then precise region definition is achieved, but manufacturing complexity increases

Engineering Contradiction:
Improveregion definition accuracyVSAvoidnumber of masks
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent combines multiple mask functions into a single integrated mask pattern that defines the body region, source region, and JFET region simultaneously. This merging reduces the total number of masks from three separate masks to one unified mask, simplifying the manufacturing process while maintaining precise region definition through careful pattern design.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The unified mask serves multiple functions: it defines the body region, source region, and JFET region all in a single application. This multi-functional mask design eliminates the need for multiple specialized masks, reducing manufacturing complexity while maintaining the precision needed for proper device operation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures uniform channel length across all transistor cells, enhancing the device's ruggedness by maintaining consistent current density during switching and conduction, and simplifying the manufacturing process by reducing the number of masks needed.

Implementation Method 1

the low-resistance region forms an overlap region in a lateral direction by an overlap length OL1 with adjacent body region in a first direction, forms with an overlap region in the lateral direction by an overlap length OL2 with adjacent body region in a second direction

Methodology Applied
Scientific EffectOverlap region formation:

Data Source

PatentUS20240234508A9Silicon carbide power semiconductor device having uniform channel length and manufacturing method thereof
Publication Date: 2024.07.11 TRINNO TECH
  • US20240234508A9 patent drawing
  • US20240234508A9 patent drawing
  • US20240234508A9 patent drawing

AI summary

Silicon carbide power semiconductor device having uniform channel length and manufacturing method thereof disclosed. The power semiconductor device includes a drift region of a first conductivity type, a plurality of body regions of a second conductivity type, being formed to be spaced apart from each other with a preset WS in a horizontal direction in an upper region of the drift region, a JFET region of the first conductivity type and a low-resistance region of the first conductivity type, being formed in a separation space between adjacent body regions to contact their side surfaces with the adjacent body regions and a source region of the first conductivity type, being formed in a surface region in the body region in contact with the low-resistance region to be spaced apart from the low-resistance region by a preset channel length.