SiC MOSFET Built-In Diode Layout for Surge and Stacking Fault Control

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Solution Overview

Problem

Silicon carbide-based MOSFETs face increased on-resistance due to stacking faults caused by reflux currents through bipolar-operating pn junction diodes, leading to reduced reliability, and have limited surge current withstand capacity, which can result in device destruction from high surge voltages.

Innovation Solution

Incorporating a Schottky barrier diode (SBD) as a built-in diode and strategically placing pillar regions in the silicon carbide layer to operate the pn junction diode at a lower voltage during surge currents, thereby suppressing stacking fault growth and enhancing surge current withstand capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a pn junction diode is used as a built-in diode in silicon carbide MOSFET, then the device can handle reflux currents, but stacking faults grow due to carrier recombination energy, increasing on-resistance and reducing reliability

Engineering Contradiction:
Improvereflux current handling capabilityVSAvoiddevice reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent extracts the harmful bipolar operation mode from the diode function by introducing a unipolar Schottky barrier diode configuration. This separates the reflux current handling capability from the harmful carrier recombination effects, allowing the device to maintain adaptability while improving reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the operational parameters of the diode by transitioning from bipolar pn junction operation to unipolar Schottky barrier operation. This parameter change eliminates the stacking fault growth mechanism while preserving the essential diode function for reflux current handling.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a Schottky barrier diode is provided to suppress stacking fault growth, then reliability improves, but surge current withstand capacity remains limited and device destruction can occur from high surge voltages

Engineering Contradiction:
Improvedevice reliabilityVSAvoidsurge current withstand capacity
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent introduces an intermediary pn junction diode structure that activates during surge conditions. This intermediary element provides an additional current path that supplements the Schottky barrier diode, enabling the device to withstand high surge currents while maintaining the reliability benefits of unipolar operation during normal conditions.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a dynamic system where the diode structure adapts its behavior based on operating conditions. During normal operation, the Schottky barrier provides unipolar conduction for reliability, while during surge events, the pn junction component activates to provide additional surge current handling capability.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If high surge voltage is applied to MOSFET beyond steady state, then surge current flows to meet demand, but heat generation destroys the MOSFET

Engineering Contradiction:
Improvesurge voltage response capabilityVSAvoiddevice temperature
Core Design Contradiction:
Adaptability or versatilityVSTemperature

Solution Approach 1:

The patent implements preliminary protective action by designing a diode structure with inherent low forward voltage characteristics. This preliminary design feature ensures that during surge events, the diode conducts current with minimal voltage drop before excessive heat can generate, preemptively protecting the MOSFET from thermal destruction.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent converts the potentially harmful high surge voltage into a beneficial effect by utilizing the diode's forward conduction特性. The surge voltage that would normally cause destructive heating is instead channeled through the diode's low-resistance path, where it is dissipated safely, transforming a harmful condition into a protective mechanism.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses the growth of stacking faults, improving the reliability and surge current withstand capacity of silicon carbide-based MOSFETs by ensuring the pn junction diode operates at a lower voltage during surge events, thus preventing device destruction.

Implementation Method 1

By providing a Schottky barrier diode (SBD) operating in a unipolar manner in the MOSFET as a built-in diode, it is possible to suppress the growth of a stacking fault in the silicon carbide layer

Methodology Applied
Scientific EffectSchottky barrier:

Implementation Method 2

when a reflux current is made to flow by using a pn junction diode that operates in a bipolar manner, a stacking fault grows in a silicon carbide layer due to the recombination energy of the carriers

Methodology Applied
Scientific EffectBipolar conduction:

Implementation Method 3

a gate insulating layer provided between the gate electrode and the second silicon carbide region, the gate insulating layer provided between the gate electrode and the third silicon carbide region, and the gate insulating layer provided between the gate electrode and the second region

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Data Source

PatentUS12107127B2Semiconductor device
Publication Date: 2024.10.01 KK TOSHIBA
  • US12107127B2 patent drawing
  • US12107127B2 patent drawing
  • US12107127B2 patent drawing

AI summary

A semiconductor device of embodiments includes: a first electrode; a second electrode; a gate electrode extending in a first direction; and a SiC layer. The SiC layer includes: a first conductive type first SiC region having a first region, a second region facing the gate electrode, and a third region in contact with the first electrode; a second conductive type second SiC region between the second region and the third region; a second conductive type third SiC region, the second region interposed between the second SiC region and the third SiC region; a second conductive type fourth SiC region, the third region interposed between the second SiC region and the fourth SiC region; a first conductive type fifth SiC region; a second conductive type sixth SiC region between the first region and the second SiC region; and a second conductive type seventh SiC region between the first region and the second SiC region and distant from the sixth SiC region in the first direction.