SiC MOSFET p+-Type Region for Hole Extraction and Thermal Breakdown Prevention
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Solution Overview
Problem
Silicon carbide (SiC) MOSFETs experience bipolar degradation due to basal plane dislocations forming stacking faults, leading to increased element resistance and thermal breakdown during recovery operations in power conversion devices, limiting their reliability and miniaturization potential.
Innovation Solution
A silicon carbide semiconductor device is designed with a p+-type semiconductor region surrounding the active region on the epitaxial layer to facilitate the outflow of holes, preventing thermal breakdown and enhancing the Reverse Recovery Safe Operation Area (RRSOA) capability by ensuring efficient hole flow during recovery operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the body diode is used as a freewheeling diode to miniaturize the inverter, then the device size is reduced, but bipolar degradation occurs causing increased element resistance and thermal breakdown
Solution Approach 1:
The patent extracts the harmful factor (holes) from the system by providing a dedicated outflow path through the p-type semiconductor layer and emitter electrode. This prevents hole accumulation in the drift layer that would otherwise cause thermal breakdown and bipolar degradation, thereby maintaining element reliability while allowing the body diode to function as a freewheeling diode for miniaturization.
Solution Approach 2:
The p-type semiconductor layer acts as an intermediary structure that facilitates hole outflow. By introducing this intermediate layer between the drift layer and emitter electrode, the patent creates a dedicated pathway for hole extraction, preventing direct thermal breakdown in the drift layer while maintaining the compact inverter design.
2Ease of operation
If holes are allowed to accumulate during recovery operation, then the body diode can handle reverse current, but thermal breakdown occurs due to heat generation from hole concentration
Solution Approach 1:
The patent extracts accumulated holes from the drift layer through the p-type semiconductor layer and emitter electrode connection. This continuous extraction mechanism prevents heat generation from hole concentration while maintaining the body diode's ability to handle reverse current during recovery operations, thereby controlling element temperature.
3Power
If the drift layer thickness is reduced to achieve high breakdown voltage, then the element resistance is reduced, but the device becomes more susceptible to bipolar degradation
Solution Approach 1:
The patent implements preliminary action by providing a hole outflow path through the p-type semiconductor layer before bipolar degradation can occur. This preventive structure ensures that holes are continuously extracted during operation, preventing the expansion of basal plane dislocations into stacking faults, thereby maintaining resistance stability even with reduced drift layer thickness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents thermal breakdown and increases the RRSOA capability, improving the reliability and miniaturization of SiC-MOSFETs, even with high basal plane dislocation densities, while maintaining high breakdown voltage and preventing excessive resistance.
Implementation Method 1
a p+-type semiconductor region which is a hole outflow region is formed on an upper surface of the epitaxial layer so as to surround the active region
Implementation Method 2
a basal plane dislocation (BPD) present in a SiC drift layer expands to form a stacking fault during bipolar operation
Implementation Method 3
When electrons and holes are recombined in the BPD, energy of this recombination causes the BPD to expand to form a stacking fault
Data Source
AI summary
Provided is a silicon carbide semiconductor device in which SiC-MOSFETs are formed within an active region of an n-type silicon carbide semiconductor substrate, and a p+-type semiconductor region is formed on an upper surface of an epitaxial layer so as to surround the active region.