SiC MOSFET P-Well Formation With Two-Step Ion Implantation

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Solution Overview

Problem

Multiple Al ion implantation in planar gate SiC MOSFET processes causes surface damage and roughness of the P well channel, limiting channel carrier mobility and device conductivity.

Innovation Solution

A two-step ion implantation process forms a first easy-to-diffuse region followed by a second deeper, less-diffuse region, with a shared mask layer, to create a well region through junction diffusion, reducing surface roughness and enhancing conductivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If multiple Al ion implantation is used to form P well, then the P well depth is sufficient, but the channel surface becomes rough and conductivity decreases

Engineering Contradiction:
ImproveP well depthVSAvoidchannel surface roughness
Core Design Contradiction:
Length of stationary objectVSManufacturing precision

Solution Approach 1:

The P well formation process is segmented into two distinct ion implantation steps: first forming a shallow easy-to-diffuse region, then forming a deeper difficult-to-diffuse region. This segmentation allows the channel surface to remain smooth while achieving sufficient P well depth through the combined effect of both regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the diffusion parameters by using two different ion types with different diffusion characteristics. The easy-to-diffuse ions (first conductive type) provide shallow doping that diffuses well, while the difficult-to-diffuse ions (second conductive type) provide deep doping with minimal diffusion, maintaining surface quality while achieving depth.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If multiple Al ion implantation is used to form P well, then the P well is formed, but device conductivity is limited

Engineering Contradiction:
ImproveP well formationVSAvoidchannel carrier mobility
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The invention changes the diffusion parameters by using two different ion types with different diffusion characteristics. The easy-to-diffuse ions (first conductive type) provide shallow doping that diffuses well, while the difficult-to-diffuse ions (second conductive type) provide deep doping with minimal diffusion, maintaining surface quality while achieving depth.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

Different regions of the P well are given different local qualities through selective ion implantation. The shallow region has easy-to-diffuse ions for good conductivity near the surface, while the deep region has difficult-to-diffuse ions for stable deep doping. This local differentiation optimizes both surface mobility and overall P well formation.

Inventive Principle:
Principle #3Local quality

3Length of stationary object

If multiple Al ion implantation is used, then P well depth is achieved, but surface damage occurs

Engineering Contradiction:
ImproveP well depthVSAvoidsurface damage
Core Design Contradiction:
Length of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The P well formation process is segmented into two distinct ion implantation steps: first forming a shallow easy-to-diffuse region, then forming a deeper difficult-to-diffuse region. This segmentation allows the channel surface to remain smooth while achieving sufficient P well depth through the combined effect of both regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The easy-to-diffuse ion region acts as an intermediary layer between the surface and the deep difficult-to-diffuse ion region. This intermediary layer protects the surface from direct damage by the deeper ion implantation while still allowing the deep region to be formed effectively.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method reduces channel surface roughness, improves channel mobility, and enhances device reliability by maintaining SiC crystal quality and gate oxide integrity, while simplifying the manufacturing process.

Implementation Method 1

the first implantation region is activated to form a required well region in a mode of junction diffusion in the first implantation region

Methodology Applied
Scientific EffectJunction diffusion: Diffusion

Implementation Method 2

first well ions of a first conductive type are implanted in a surface layer on the front of the substrate to form a first implantation region

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentEP4270490B1Mosfet device and manufacturing method therefor
Publication Date: 2025.09.24 UNITED NOVA TECHNOLOGY YUEZHOU (SHAOXING) CORP
  • EP4270490B1 patent drawingFigure 1
  • EP4270490B1 patent drawingFigure 2(A)~2(F)

AI summary

The present invention provides a metal oxide semiconductor field effect transistor (MOSFET) device and a manufacturing method therefor. First, a first implantation region easy to diffuse is formed, and then, a second implantation region which is not easy to diffuse and has a deeper junction is formed in sequence. After ion implantation in a source region and the like is completed, the first implantation region is activated to form a required well region in a mode of junction diffusion in the first implantation region, and the second implantation region is used for increasing the depth of the well region, thereby avoiding the problems of damage to the surface of a substrate at a channel and roughness of the surface of the channel of the device caused by the formation of a P well directly through multiple Al ion implantation in the prior art, and achieving high conductivity of the device. In addition, the ion implantation in the first implantation region, the second implantation region and the source region can use a same mask layer, so that the process is simple to implement, and the photoetching frequency can be effectively reduced.