SiC Edge Termination via Negative Bevel Curvature
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Solution Overview
Problem
Silicon Carbide (SiC) semiconductor devices face a challenge in achieving high blocking voltage due to field crowding at the edge, which decreases the blocking voltage below the ideal level, necessitating an efficient edge termination solution.
Innovation Solution
The implementation of a negative bevel edge termination with multiple steps that approximate a smooth slope, reducing field crowding and improving blocking voltage, achieved through etching or counter-doping techniques, specifically forming a multi-step negative bevel edge termination in SiC semiconductor devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a Junction Termination Extension (JTE) is used for edge termination, then the device structure is simplified and manufacturing is easier, but field crowding at the edge causes blocking voltage to decrease below the ideal level
Solution Approach 1:
The patent applies curvature by replacing the sharp corner geometry with a rounded or curved edge termination profile. This curvature distributes the electric field more uniformly along the edge, eliminating the field crowding effect that occurs at sharp corners. The rounded edge geometry reduces peak electric field intensity while maintaining manufacturing feasibility, thereby improving blocking voltage without significantly complicating the fabrication process.
Solution Approach 2:
The patent transitions from a two-dimensional planar edge termination to a three-dimensional curved or rounded edge structure. By adding the dimensional aspect of curvature radius, the electric field distribution is fundamentally altered from concentrated at a sharp corner to distributed along a curved surface, effectively reducing field crowding and improving blocking voltage performance.
2Reliability
If the base layer is etched down to the drift layer to form JTE wells, then the edge termination is achieved, but a corner is formed that causes electric field crowding and decreases blocking voltage
Solution Approach 1:
The patent directly addresses the corner shape problem by replacing it with a curved or rounded edge termination profile. This curvature eliminates the sharp corner geometry that causes electric field crowding, distributing the field more uniformly along the edge. The modified shape maintains the functional benefits of edge termination while eliminating the harmful field concentration effect.
3Reliability
If a negative bevel edge termination with multiple steps is implemented, then field crowding is reduced and blocking voltage approaches ideal levels, but the device structure and manufacturing process become more complex
Solution Approach 1:
The patent employs a curved or rounded edge termination profile as a simpler alternative to multi-step bevel structures. This single continuous curvature achieves the same field distribution benefits as complex multi-step bevels but with significantly reduced structural complexity and manufacturing steps, thereby improving blocking voltage without proportionally increasing device complexity.
Data Source
AI summary
The present disclosure relates to a Silicon Carbide (SiC) semiconductor device having both a high blocking voltage and low on-resistance. In one embodiment, the semiconductor device has a blocking voltage of at least 10 kilovolts (kV) and an on-resistance of less than 10 milli-ohms centimeter squared (mΩ·cm2) and even more preferably less than 5 mΩ·cm2. In another embodiment, the semiconductor device has a blocking voltage of at least 15 kV and an on-resistance of less than 15 mΩ·cm2 and even more preferably less than 7 mΩ·cm2. In yet another embodiment, the semiconductor device has a blocking voltage of at least 20 kV and an on-resistance of less than 20 mΩ·cm2 and even more preferably less than 10 mΩ·cm2. The semiconductor device is preferably, but not necessarily, a thyristor such as a power thyristor, a Bipolar Junction Transistor (BJT), an Insulated Gate Bipolar Transistor (IGBT), or a PIN diode.