SiC Shielding Structure for Gate Oxide Protection
Solution Overview
Problem
SiC power devices face challenges in achieving long-term reliability due to limitations in gate oxide shielding, particularly in trench-gate designs where the p-type buried implant's limited depth and the n-type region's width between shielding regions lead to sensitive electric field dependence, and dual-channel designs struggle with maintaining threshold voltage stability and increased ON-resistance.
Innovation Solution
A semiconductor device with a SiC substrate featuring a current-conduction region and a shielding region of higher net doping concentration, where the shielding region's length to current-conduction region's width ratio (L/d) is between 1 to 10, providing effective shielding and reducing the impact of electric fields on the gate oxide.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a p-type buried implant is used for gate oxide shielding in trench-gate devices, then shielding is provided, but the implantation energy limitations result in a very limited depth of about only 500 nm below the gate trench bottom
Solution Approach 1:
The patent transitions from a conventional horizontal shielding approach (p-type implant at the trench bottom) to a vertical shielding approach (n-type region extending downward from the trench bottom). This dimensional change allows the shielding effect to reach deeper into the substrate without being limited by implantation energy constraints, effectively solving the depth limitation problem while maintaining shielding effectiveness.
2Reliability
If the width of the n-type region between neighboring p-type shielding regions is increased to reduce field crowding, then electric field distribution improves, but the electric field at the gate oxide depends sensitively on gate trench depth, n-type region width, and drain potential
Solution Approach 1:
The patent changes the conductivity type and spatial arrangement of the shielding region. By creating an n-type region that extends vertically downward from the trench bottom rather than relying on horizontal p-type implants, the system achieves better electric field distribution while reducing sensitivity to lateral dimensional variations. The vertical extension provides a more stable shielding effect that is less dependent on precise control of n-type region width between trenches.
3Adaptability or versatility
If dual-channel designs use both gate trench sidewalls as channel regions, then device functionality is enhanced, but the threshold voltage becomes sensitive to trench width and n-type region width due to p-implantation tail effects
Solution Approach 1:
The patent extracts and removes the problematic p-type implantation tail from the device structure by using a different shielding approach. Instead of relying on p-type implants that create lateral tails affecting the channel, the invention uses an n-type region extending downward from the trench bottom. This extraction of the harmful p-type tail eliminates its interfering effect on the dual-channel threshold voltage while preserving the necessary shielding functionality.
4Reliability
If a p-type implant is connected to the source contact to shield the gate oxide in a two-sided channel design, then shielding is achieved, but the RonA (ON-resistance per unit area) increases and the structure becomes more complicated to fabricate
Solution Approach 1:
The patent makes the n-type region serve multiple functions simultaneously: it provides gate oxide shielding, maintains low ON-resistance by being connected to the source contact, and supports dual-channel operation. This multi-functional n-type region eliminates the need for separate p-type implant structures, thereby reducing both structural complexity and fabrication steps while achieving the desired shielding effect.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the reliability of SiC devices by maintaining the electric field within safe limits, reducing the risk of gate dielectric breakdown and minimizing ON-resistance, while allowing for stable threshold voltage control and reduced process-induced variations.
Implementation Method 1
a shielding region of a second conductivity type laterally adjacent to the current-conduction region and configured to at least partly shield the device structure from the electric field
Data Source
AI summary
A semiconductor device includes: a SiC substrate; a device structure in or on the SiC substrate and subject to an electric field during operation of the semiconductor device; a current-conduction region of a first conductivity type in the SiC substrate below and adjoining the device structure; and a shielding region of a second conductivity type laterally adjacent to the current-conduction region and configured to at least partly shield the device structure from the electric field. The shielding region has a higher net doping concentration than the current-conduction region, and has a length (L) measured from a first position which corresponds to a bottom of the device structure to a second position which corresponds to a bottom of the shielding region. The current-conduction region has a width (d) measured between opposing lateral sides of the current-conduction region, and L/d is in a range of 1 to 10.