SiC-on-Silicon Epitaxial Structure for Higher Breakdown Voltage
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Solution Overview
Problem
Current electronic devices made from silicon carbide face challenges such as limited wafer sizes, high manufacturing costs, and complex technology due to the need for thicker silicon carbide layers to prevent electrical fields in silicon substrates, which can increase on-resistance and reduce breakdown voltages.
Innovation Solution
An integrated electronic device is developed using a silicon substrate with silicon carbide epitaxial layers, where buffer layers and doping profiles are optimized to confine electrical fields within the silicon carbide, preventing breakdown in the silicon substrate and reducing on-resistance, while allowing for larger wafer sizes and cost-effective manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silicon carbide is used to enable higher breakdown voltages and lower on-resistances, then device performance is improved, but manufacturing cost and technological complexity increase due to limited wafer availability
Solution Approach 1:
The patent employs a composite structure combining silicon carbide epitaxial layers (for high breakdown voltage and low on-resistance) deposited on a silicon substrate (for manufacturing advantage). This composite approach allows the device to achieve silicon carbide performance characteristics while utilizing the manufacturing infrastructure and larger wafer availability of silicon substrates, thereby resolving the contradiction between performance improvement and manufacturing complexity.
2Quantity of substance
If silicon carbide epitaxial layers are used on silicon substrate, then charge concentration is improved, but electrical field generates in silicon substrate limiting breakdown voltage
Solution Approach 1:
The patent applies local quality by creating vertically stratified doping profiles within the silicon carbide epitaxial layers. The doping concentration varies at different depths and lateral positions, with higher doping near the silicon substrate interface to confine the electrical field locally within the silicon carbide layer, and lower doping in upper regions to maintain low on-resistance. This localized doping strategy prevents electrical field penetration into the silicon substrate while maintaining optimal charge concentration for device performance.
Solution Approach 2:
The patent utilizes parameter changes by precisely controlling doping concentrations, layer thicknesses, and material composition gradients within the silicon carbide epitaxial structure. By optimizing these parameters, the electrical field distribution is engineered to be confined within the silicon carbide layer, preventing field penetration into the silicon substrate and thereby achieving both high charge concentration and high breakdown voltage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively confines electrical fields within silicon carbide layers, enhancing breakdown voltages and reducing on-resistance, thus improving the performance and manufacturing efficiency of silicon carbide-based electronic devices.
Implementation Method 1
the critical electrical field of silicon carbide is higher than the critical electrical field of silicon... silicon carbide enables provision of junctions having breakdown voltages higher than what may be obtained using silicon
Data Source
AI summary
An embodiment of an integrated electronic device formed in a body of semiconductor material, which includes: a substrate of a first semiconductor material, the first semiconductor material having a first bandgap; a first epitaxial region of a second semiconductor material and having a first type of conductivity, which overlies the substrate and defines a first surface, the second semiconductor material having a second bandgap wider than the first bandgap; and a second epitaxial region of the first semiconductor material, which overlies, and is in direct contact with, the first epitaxial region. The first epitaxial region includes a first buffer layer, which overlies the substrate, and a drift layer, which overlies the first buffer layer and defines the first surface, the first buffer layer and the drift layer having different doping levels.