SiC Trench Transistor Compensation Layer
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Solution Overview
Problem
Existing SiC trench transistors face challenges in reducing gate oxide field strength without increasing surface area or electrical resistance, limiting integration density and increasing ohmic losses due to conventional design measures like double trench and p-bubbles.
Innovation Solution
Incorporating a horizontally extending compensation layer with opposite doping type in the epitaxial layer between the gate trench and drain, allowing for controlled electric field distribution and reduced gate field strength without increasing surface area, enabling denser trench packing and lower specific sheet resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional measures like double trench or p-bubbles are used to reduce gate oxide field strength, then gate field strength is reduced, but surface area and electrical resistance increase
Solution Approach 1:
The patent introduces a compensation layer that extends in the vertical dimension between the gate trench and the drift region, rather than using lateral extensions like double trenches. This vertical compensation layer creates a step in the vertical field profile, reducing the gate oxide field strength without increasing the lateral surface area, thus resolving the contradiction between field strength reduction and area minimization.
2Object-affected harmful factors
If double trench structure is used to reduce gate oxide field strength, then gate field strength is reduced, but specific sheet resistance increases
Solution Approach 1:
The compensation layer is positioned vertically between the gate trench and drift region, creating a localized field reduction zone without disrupting the horizontal current flow path. This vertical arrangement avoids the JFET effect and additional resistance paths introduced by lateral double trench structures, thereby reducing gate field strength while minimizing increases in specific sheet resistance.
3Object-affected harmful factors
If p-doped regions are introduced below gate oxide to reduce field strength, then gate field strength is reduced, but device complexity increases
Solution Approach 1:
The patent extracts the field compensation function from the drift region and places it in a dedicated compensation layer positioned vertically between the gate trench and drift region. This separation allows independent optimization of the compensation layer doping profile without affecting the drift region performance, simplifying the overall device structure while achieving field strength reduction.
4Loss of energy
If higher n-type doping is used in drift region near channel, then ohmic losses are reduced, but voltage capacity of drift zone deteriorates
Solution Approach 1:
The compensation layer creates a localized modification of the electric field profile in the region between the gate trench and drift region. This allows higher n-type doping in the drift region near the channel to reduce ohmic losses, while the compensation layer's opposite doping type creates a vertical field step that preserves the voltage capacity by controlling the field distribution in the gate region separately.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces gate field strength, enhances integration density, and minimizes ohmic losses by decoupling the field region near the gate from the epitaxial layer, allowing for higher n-type doping in the drift region without compromising voltage capacity.
Implementation Method 1
the compensation layer permits a reduction in the electrical field strength of the gate without increased surface requirement. This additional layer produces a step in the vertical field profile
Implementation Method 2
a compensation layer having an effective doping of a type opposite to the doping of the epitaxial layer. By decoupling the field region near the gate from the epitaxial layer, that is, from the drift region
Data Source
AI summary
An SiC trench transistor having a first terminal and an epitaxial layer positioned vertically between a gate trench and a second terminal; a compensation layer extending horizontally being provided in the epitaxial layer, the compensation layer having an effective doping of a type opposite to the doping of the epitaxial layer. A method for manufacturing an SiC trench transistor is also provided, an epitaxial layer being provided on a second terminal of the SiC trench transistor; a compensation layer extending horizontally being implanted in the epitaxial layer, the compensation layer having an effective doping of a type opposite to the doping of the epitaxial layer; and a first terminal and a gate trench being provided above the compensation layer.