SiC Trench Transistor Defect Segmentation
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Solution Overview
Problem
Silicon Carbide (SiC) transistor devices face bipolar degradation due to crystal defects such as basal plane dislocations or stacking faults, leading to increased on-resistance and leakage current, which affects their performance in power electronics applications.
Innovation Solution
The design incorporates a SiC semiconductor body with a trench structure featuring elongated or needle-shaped trenches that reduce the propagation of crystal defects, along with a specific layout of transistor cells and dielectric layers to minimize bipolar degradation, and includes a method of forming trenches and source contacts to integrate transistor cells efficiently within mesa regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transistor cells are integrated in SiC semiconductor body, then device functionality is achieved, but bipolar degradation occurs due to crystal defects
Solution Approach 1:
The patent divides the semiconductor body into discrete mesa regions separated by trenches. Each mesa region contains isolated transistor cells, preventing defect propagation between cells. This segmentation isolates crystal defects to individual mesas, maintaining overall device reliability despite the presence of defects in the SiC material.
Solution Approach 2:
The patent creates distinct local regions with different properties: mesas with high-quality crystal structure for transistor operation, and trenches with defect-tolerant characteristics. By optimizing each region's properties locally and isolating defects to specific areas, the device maintains high performance while managing the inherent defects of SiC material.
2Ease of manufacture
If source contacts are placed at trench bottom, then manufacturing is simplified, but on-resistance increases
Solution Approach 1:
Instead of placing source contacts only at the bottom of trenches (one-dimensional positioning), the patent extends contacts along the trench sidewalls and into the mesa regions (adding lateral dimensionality). This multi-dimensional contact arrangement reduces current path length and resistance while maintaining manufacturing simplicity through conformal deposition processes.
3Quantity of substance
If crystal defects are present in SiC body, then material availability is improved, but defect expansion increases on-resistance
Solution Approach 1:
The patent extracts harmful crystal defects from the active transistor regions by confining them to trench areas and mesa boundaries. By removing defects from the critical current paths and isolating them in non-active regions, the material can be sourced from defect-prone SiC growth processes while maintaining low on-resistance in the functional areas.
Data Source
AI summary
A transistor device and a method for producing thereof are disclosed. The transistor device includes: a SiC semiconductor body that includes a first semiconductor layer; a plurality of trenches each extending from a first surface of the first semiconductor layer into the first semiconductor layer; and a plurality of transistor cells each coupled to a source node. The first semiconductor layer includes a plurality of mesa regions each formed between two neighboring ones of the trenches, in each of the mesa regions, at least one of the plurality of transistor cells is at least partially integrated, each of the transistor cells is connected to the source node via a respective source contact, and each of the source contacts is arranged in a respective one of the trenches and is spaced apart from a bottom of the respective trench.